| Message ID | 20191113005201.19005-3-joel@jms.id.au |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm/aspeed: Watchdog and SDRAM fixes | expand |
Joel Stanley <joel@jms.id.au> writes: > This models the clock write one to clear registers, and fixes up some > incorrect behavior in all of the write to clear registers. > > There was also a typo in one of the register definitions. > > Reviewed-by: Cédric Le Goater <clg@kaod.org> > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > hw/misc/aspeed_scu.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c > index 717509bc5460..aac4645f8c3c 100644 > --- a/hw/misc/aspeed_scu.c > +++ b/hw/misc/aspeed_scu.c > @@ -98,7 +98,7 @@ > #define AST2600_CLK_STOP_CTRL TO_REG(0x80) > #define AST2600_CLK_STOP_CTRL_CLR TO_REG(0x84) > #define AST2600_CLK_STOP_CTRL2 TO_REG(0x90) > -#define AST2600_CLK_STOP_CTR2L_CLR TO_REG(0x94) > +#define AST2600_CLK_STOP_CTRL2_CLR TO_REG(0x94) > #define AST2600_SDRAM_HANDSHAKE TO_REG(0x100) > #define AST2600_HPLL_PARAM TO_REG(0x200) > #define AST2600_HPLL_EXT TO_REG(0x204) > @@ -532,11 +532,12 @@ static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset, > return s->regs[reg]; > } > > -static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, > +static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data64, > unsigned size) > { > AspeedSCUState *s = ASPEED_SCU(opaque); > int reg = TO_REG(offset); > + uint32_t data = data64; Does it make much difference silently truncating to 32 bit here vs in the actual set further down? AFAICT most _write functions just deal with it at the final set. > > if (reg >= ASPEED_AST2600_SCU_NR_REGS) { > qemu_log_mask(LOG_GUEST_ERROR, > @@ -563,15 +564,19 @@ static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, > /* fall through */ > case AST2600_SYS_RST_CTRL: > case AST2600_SYS_RST_CTRL2: > + case AST2600_CLK_STOP_CTRL: > + case AST2600_CLK_STOP_CTRL2: > /* W1S (Write 1 to set) registers */ > s->regs[reg] |= data; > return; > case AST2600_SYS_RST_CTRL_CLR: > case AST2600_SYS_RST_CTRL2_CLR: > + case AST2600_CLK_STOP_CTRL_CLR: > + case AST2600_CLK_STOP_CTRL2_CLR: > case AST2600_HW_STRAP1_CLR: > case AST2600_HW_STRAP2_CLR: > /* W1C (Write 1 to clear) registers */ > - s->regs[reg] &= ~data; > + s->regs[reg - 1] &= ~data; It might be worth expanding the W1C comment just to mention the alignment of _CLR vs _CTRL registers. Otherwise: Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > return; > > case AST2600_RNG_DATA: -- Alex Bennée
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 717509bc5460..aac4645f8c3c 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -98,7 +98,7 @@ #define AST2600_CLK_STOP_CTRL TO_REG(0x80) #define AST2600_CLK_STOP_CTRL_CLR TO_REG(0x84) #define AST2600_CLK_STOP_CTRL2 TO_REG(0x90) -#define AST2600_CLK_STOP_CTR2L_CLR TO_REG(0x94) +#define AST2600_CLK_STOP_CTRL2_CLR TO_REG(0x94) #define AST2600_SDRAM_HANDSHAKE TO_REG(0x100) #define AST2600_HPLL_PARAM TO_REG(0x200) #define AST2600_HPLL_EXT TO_REG(0x204) @@ -532,11 +532,12 @@ static uint64_t aspeed_ast2600_scu_read(void *opaque, hwaddr offset, return s->regs[reg]; } -static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, +static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data64, unsigned size) { AspeedSCUState *s = ASPEED_SCU(opaque); int reg = TO_REG(offset); + uint32_t data = data64; if (reg >= ASPEED_AST2600_SCU_NR_REGS) { qemu_log_mask(LOG_GUEST_ERROR, @@ -563,15 +564,19 @@ static void aspeed_ast2600_scu_write(void *opaque, hwaddr offset, uint64_t data, /* fall through */ case AST2600_SYS_RST_CTRL: case AST2600_SYS_RST_CTRL2: + case AST2600_CLK_STOP_CTRL: + case AST2600_CLK_STOP_CTRL2: /* W1S (Write 1 to set) registers */ s->regs[reg] |= data; return; case AST2600_SYS_RST_CTRL_CLR: case AST2600_SYS_RST_CTRL2_CLR: + case AST2600_CLK_STOP_CTRL_CLR: + case AST2600_CLK_STOP_CTRL2_CLR: case AST2600_HW_STRAP1_CLR: case AST2600_HW_STRAP2_CLR: /* W1C (Write 1 to clear) registers */ - s->regs[reg] &= ~data; + s->regs[reg - 1] &= ~data; return; case AST2600_RNG_DATA: