Message ID | 20190904193059.26202-60-richard.henderson@linaro.org |
---|---|
State | New |
Headers | show |
Series | target/arm: Convert aa32 base isa to decodetree | expand |
On 9/4/19 9:30 PM, Richard Henderson wrote: > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/arm/translate.c | 3 +-- > target/arm/t16.decode | 17 +++++++++++++++++ > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/target/arm/translate.c b/target/arm/translate.c > index b70491d39e..69092c12c3 100644 > --- a/target/arm/translate.c > +++ b/target/arm/translate.c > @@ -10891,8 +10891,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) > > case 15: /* IT, nop-hint. */ > if ((insn & 0xf) == 0) { > - gen_nop_hint(s, (insn >> 4) & 0xf); > - break; > + goto illegal_op; /* nop hint, in decodetree */ > } > /* > * IT (If-Then) > diff --git a/target/arm/t16.decode b/target/arm/t16.decode > index 19a442b894..5829b9a58c 100644 > --- a/target/arm/t16.decode > +++ b/target/arm/t16.decode > @@ -19,6 +19,7 @@ > # This file is processed by scripts/decodetree.py > # > > +&empty !extern > &s_rrr_shi !extern s rd rn rm shim shty > &s_rrr_shr !extern s rn rd rm rs shty > &s_rri_rot !extern s rn rd imm rot > @@ -204,3 +205,19 @@ SETEND 1011 0110 010 1 E:1 000 &setend > REV 1011 1010 00 ... ... @rdm > REV16 1011 1010 01 ... ... @rdm > REVSH 1011 1010 11 ... ... @rdm > + > +# Hints > + > +{ > + YIELD 1011 1111 0001 0000 > + WFE 1011 1111 0010 0000 > + WFI 1011 1111 0011 0000 > + > + # TODO: Implement SEV, SEVL; may help SMP performance. > + # SEV 1011 1111 0100 0000 > + # SEVL 1011 1111 0101 0000 > + > + # The canonical nop has the second nibble as 0000, but the whole of the > + # rest of the space is a reserved hint, behaves as nop. > + NOP 1011 1111 ---- 0000 > +} > Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
diff --git a/target/arm/translate.c b/target/arm/translate.c index b70491d39e..69092c12c3 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -10891,8 +10891,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn) case 15: /* IT, nop-hint. */ if ((insn & 0xf) == 0) { - gen_nop_hint(s, (insn >> 4) & 0xf); - break; + goto illegal_op; /* nop hint, in decodetree */ } /* * IT (If-Then) diff --git a/target/arm/t16.decode b/target/arm/t16.decode index 19a442b894..5829b9a58c 100644 --- a/target/arm/t16.decode +++ b/target/arm/t16.decode @@ -19,6 +19,7 @@ # This file is processed by scripts/decodetree.py # +&empty !extern &s_rrr_shi !extern s rd rn rm shim shty &s_rrr_shr !extern s rn rd rm rs shty &s_rri_rot !extern s rn rd imm rot @@ -204,3 +205,19 @@ SETEND 1011 0110 010 1 E:1 000 &setend REV 1011 1010 00 ... ... @rdm REV16 1011 1010 01 ... ... @rdm REVSH 1011 1010 11 ... ... @rdm + +# Hints + +{ + YIELD 1011 1111 0001 0000 + WFE 1011 1111 0010 0000 + WFI 1011 1111 0011 0000 + + # TODO: Implement SEV, SEVL; may help SMP performance. + # SEV 1011 1111 0100 0000 + # SEVL 1011 1111 0101 0000 + + # The canonical nop has the second nibble as 0000, but the whole of the + # rest of the space is a reserved hint, behaves as nop. + NOP 1011 1111 ---- 0000 +}