@@ -260,8 +260,6 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
void tlb_set_page(CPUState *cpu, target_ulong vaddr,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size);
-void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
- uintptr_t retaddr);
#else
static inline void tlb_init(CPUState *cpu)
{
@@ -312,6 +310,8 @@ static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu,
{
}
#endif
+void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
+ uintptr_t retaddr);
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
@@ -188,6 +188,20 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
g_assert_not_reached();
}
+void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
+ uintptr_t retaddr)
+{
+ if (!guest_addr_valid(addr) ||
+ page_check_range(addr, size, PAGE_WRITE) < 0) {
+ CPUState *cpu = env_cpu(env);
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ cc->tlb_fill(cpu, addr, size, MMU_DATA_STORE, MMU_USER_IDX, false,
+ retaddr);
+ g_assert_not_reached();
+ }
+}
+
#if defined(__i386__)
#if defined(__NetBSD__)
@@ -2615,12 +2615,6 @@ uint32_t HELPER(cu42)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t m3)
void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
uintptr_t ra)
{
-#ifdef CONFIG_USER_ONLY
- if (!guest_addr_valid(addr) || !guest_addr_valid(addr + len - 1) ||
- page_check_range(addr, len, PAGE_WRITE) < 0) {
- s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra);
- }
-#else
/* test the actual access, not just any access to the page due to LAP */
while (len) {
const uint64_t pagelen = -(addr | TARGET_PAGE_MASK);
@@ -2630,7 +2624,6 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
addr = wrap_address(env, addr + curlen);
len -= curlen;
}
-#endif
}
void HELPER(probe_write_access)(CPUS390XState *env, uint64_t addr, uint64_t len)