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[07/25] clocksource/drivers/tegra: Reset hardware state on init

Message ID 20190626144651.16742-7-daniel.lezcano@linaro.org
State Accepted
Commit 77d57d1d8016696daaf5614c070ac01c9652f4ce
Headers show
Series [01/25] clocksource/drivers/timer-meson6: Update with SPDX Licence identifier | expand

Commit Message

Daniel Lezcano June 26, 2019, 2:46 p.m. UTC
From: Dmitry Osipenko <digetx@gmail.com>


Reset timer's hardware state to ensure that initially it is in a
predictable state.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>

Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

---
 drivers/clocksource/timer-tegra20.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.17.1
diff mbox series

Patch

diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c
index acd68c77fa91..3e4f12aee8df 100644
--- a/drivers/clocksource/timer-tegra20.c
+++ b/drivers/clocksource/timer-tegra20.c
@@ -123,6 +123,9 @@  static int tegra_timer_setup(unsigned int cpu)
 {
 	struct timer_of *to = per_cpu_ptr(&tegra_to, cpu);
 
+	writel(0, timer_of_base(to) + TIMER_PTV);
+	writel(TIMER_PCR_INTR_CLR, timer_of_base(to) + TIMER_PCR);
+
 	irq_force_affinity(to->clkevt.irq, cpumask_of(cpu));
 	enable_irq(to->clkevt.irq);