@@ -329,6 +329,26 @@ static void __cpuinit gic_hyp_disable(void)
GICH[GICH_HCR] = 0;
}
+int gic_irq_xlate(const u32 *intspec, unsigned int intsize,
+ unsigned int *out_hwirq,
+ unsigned int *out_type)
+{
+ if ( intsize < 3 )
+ return -EINVAL;
+
+ /* Get the interrupt number and add 16 to skip over SGIs */
+ *out_hwirq = intspec[1] + 16;
+
+ /* For SPIs, we need to add 16 more to get the GIC irq ID number */
+ if ( !intspec[0] )
+ *out_hwirq += 16;
+
+ if ( out_type )
+ *out_type = intspec[2] & DT_IRQ_TYPE_SENSE_MASK;
+
+ return 0;
+}
+
/* Set up the GIC */
void __init gic_init(void)
{
@@ -430,6 +430,7 @@ void __init start_xen(unsigned long boot_phys_offset,
setup_mm(fdt_paddr, fdt_size);
dt_unflatten_host_device_tree();
+ dt_irq_xlate = gic_irq_xlate;
#ifdef EARLY_UART_ADDRESS
/* TODO Need to get device tree or command line for UART address */
@@ -189,6 +189,10 @@ extern void send_SGI_allbutself(enum gic_sgi sgi);
/* print useful debug info */
extern void gic_dump_info(struct vcpu *v);
+/* IRQ translation function for the device tree */
+int gic_irq_xlate(const u32 *intspec, unsigned int intsize,
+ unsigned int *out_hwirq, unsigned int *out_type);
+
#endif /* __ASSEMBLY__ */
#endif
This function translates an interrupt specifier to an IRQ number and IRQ type (ie: level trigger, edge trigger,...). It's GIC specific. Signed-off-by: Julien Grall <julien.grall@linaro.org> Changes in v2: - Use DT_IRQ_TYPE_SENSE_MASK instead of IRQ_TYPE_SENSE_MASK --- xen/arch/arm/gic.c | 20 ++++++++++++++++++++ xen/arch/arm/setup.c | 1 + xen/include/asm-arm/gic.h | 4 ++++ 3 files changed, 25 insertions(+)