diff mbox series

[5/5,v3] drm/msm/mdp5: Use the interconnect API

Message ID 20190618221022.28749-1-robdclark@gmail.com
State New
Headers show
Series None | expand

Commit Message

Rob Clark June 18, 2019, 10:10 p.m. UTC 
From: Georgi Djakov <georgi.djakov@linaro.org>


The interconnect API provides an interface for consumer drivers to
express their bandwidth needs in the SoC. This data is aggregated
and the on-chip interconnect hardware is configured to the most
appropriate power/performance profile.

Use the API to configure the interconnects and request bandwidth
between DDR and the display hardware (MDP port(s) and rotator
downscaler).

v2: update the path names to be consistent with dpu, handle the NULL
    path case, updated commit msg from Georgi.
v3: split out icc setup into it's own function, and rework logic
    slightly so no interconnect paths is not fatal.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

Signed-off-by: Rob Clark <robdclark@chromium.org>

---
 drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 38 ++++++++++++++++++++++++
 1 file changed, 38 insertions(+)

-- 
2.20.1

Comments

Jeffrey Hugo June 20, 2019, 2:48 p.m. UTC | #1 
On Tue, Jun 18, 2019 at 4:10 PM Rob Clark <robdclark@gmail.com> wrote:
>

> From: Georgi Djakov <georgi.djakov@linaro.org>

>

> The interconnect API provides an interface for consumer drivers to

> express their bandwidth needs in the SoC. This data is aggregated

> and the on-chip interconnect hardware is configured to the most

> appropriate power/performance profile.

>

> Use the API to configure the interconnects and request bandwidth

> between DDR and the display hardware (MDP port(s) and rotator

> downscaler).

>

> v2: update the path names to be consistent with dpu, handle the NULL

>     path case, updated commit msg from Georgi.

> v3: split out icc setup into it's own function, and rework logic

>     slightly so no interconnect paths is not fatal.

>

> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>

> Signed-off-by: Rob Clark <robdclark@chromium.org>


Looks good to me.
Reviewed-By: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 97179bec8902..1c55401956c4 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -16,6 +16,7 @@ 
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#include <linux/interconnect.h>
 #include <linux/of_irq.h>
 
 #include "msm_drv.h"
@@ -1048,9 +1049,46 @@  static const struct component_ops mdp5_ops = {
 	.unbind = mdp5_unbind,
 };
 
+static int mdp5_setup_interconnect(struct platform_device *pdev)
+{
+	struct icc_path *path0 = of_icc_get(&pdev->dev, "mdp0-mem");
+	struct icc_path *path1 = of_icc_get(&pdev->dev, "mdp1-mem");
+	struct icc_path *path_rot = of_icc_get(&pdev->dev, "rotator-mem");
+
+	if (IS_ERR(path0))
+		return PTR_ERR(path0);
+
+	if (!path0) {
+		/* no interconnect support is not necessarily a fatal
+		 * condition, the platform may simply not have an
+		 * interconnect driver yet.  But warn about it in case
+		 * bootloader didn't setup bus clocks high enough for
+		 * scanout.
+		 */
+		dev_warn(&pdev->dev, "No interconnect support may cause display underflows!\n");
+		return 0;
+	}
+
+	icc_set_bw(path0, 0, MBps_to_icc(6400));
+
+	if (!IS_ERR_OR_NULL(path1))
+		icc_set_bw(path1, 0, MBps_to_icc(6400));
+	if (!IS_ERR_OR_NULL(path_rot))
+		icc_set_bw(path_rot, 0, MBps_to_icc(6400));
+
+	return 0;
+}
+
 static int mdp5_dev_probe(struct platform_device *pdev)
 {
+	int ret;
+
 	DBG("");
+
+	ret = mdp5_setup_interconnect(pdev);
+	if (ret)
+		return ret;
+
 	return component_add(&pdev->dev, &mdp5_ops);
 }