Message ID | 20190610171103.30903-21-grygorii.strashko@ti.com |
---|---|
State | New |
Headers | show |
Series | gpio: gpio-omap: set of fixes and big clean-up | expand |
On 12/06/2019 12:11, Linus Walleij wrote: > On Mon, Jun 10, 2019 at 7:13 PM Grygorii Strashko > <grygorii.strashko@ti.com> wrote: > >> From: Russell King <rmk+kernel@armlinux.org.uk> >> >> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> >> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> > > Patch applied. Thanks Linus. > > At your convenience please look at the debounce function a bit > closer because I think there is a bug/unpredictable behavior: > > IIUC the whole bank/block of GPIOs share the same debounce > timer setting, and it is currently handled in a "last caller wins" > manner, so if the different GPIOs in the bank has different > debounce settings, the call order decides what debounce time > is used across all of them. Yeah. this is a "known" problem :( > > In drivers/gpio/gpio-ftgpio.c function ftgpio_gpio_set_config() > I simply reject a dounce time setting > different from the currently configured if any GPIOs are > currently using the deounce feature. > > (It's the semantic I came up with but maybe there are other > ideas here.) There is one more patch in int. queue for debounce, but I've decided to send it after this series as OMAP debounce changes are usually debatable. I'll look at gpio-ftgpio also. By the way, there seems no ABI for debounce cfg in gpio_dev interface. (or i'm missing smth?) -- Best regards, grygorii
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 94b10dfbff3f..52592eac0895 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c @@ -181,7 +181,6 @@ static inline void omap_gpio_dbck_disable(struct gpio_bank *bank) static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, unsigned debounce) { - void __iomem *reg; u32 val; u32 l; bool enable = !!debounce; @@ -198,8 +197,7 @@ static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset, l = BIT(offset); clk_enable(bank->dbck); - reg = bank->base + bank->regs->debounce; - writel_relaxed(debounce, reg); + writel_relaxed(debounce, bank->base + bank->regs->debounce); val = omap_gpio_rmw(bank->base + bank->regs->debounce_en, l, enable); bank->dbck_enable_mask = val;