@@ -382,23 +382,6 @@
status = "disabled";
phys = <&exynos_usbphy 1>, <&exynos_usbphy 2>, <&exynos_usbphy 3>;
phy-names = "host", "hsic0", "hsic1";
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&exynos_usbphy 1>;
- status = "disabled";
- };
- port@1 {
- reg = <1>;
- phys = <&exynos_usbphy 2>;
- status = "disabled";
- };
- port@2 {
- reg = <2>;
- phys = <&exynos_usbphy 3>;
- status = "disabled";
- };
};
ohci: ohci@12590000 {
@@ -410,13 +393,6 @@
status = "disabled";
phys = <&exynos_usbphy 1>;
phy-names = "host";
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&exynos_usbphy 1>;
- status = "disabled";
- };
};
i2s1: i2s@13960000 {
@@ -206,9 +206,6 @@
status = "okay";
phys = <&exynos_usbphy 1>;
phy-names = "host";
- port@0 {
- status = "okay";
- };
};
&exynos_usbphy {
@@ -517,9 +514,6 @@
&ohci {
status = "okay";
- port@0 {
- status = "okay";
- };
};
&pinctrl_1 {
@@ -148,13 +148,6 @@
phys = <&exynos_usbphy 1>, <&exynos_usbphy 3>;
phy-names = "host", "hsic1";
- port@0 {
- status = "okay";
- };
-
- port@2 {
- status = "okay";
- };
};
&exynos_usbphy {
@@ -107,12 +107,6 @@
&ehci {
phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
phy-names = "hsic0", "hsic1";
- port@1 {
- status = "okay";
- };
- port@2 {
- status = "okay";
- };
};
&sound {
@@ -74,9 +74,6 @@
&ehci {
phys = <&exynos_usbphy 2>;
phy-names = "hsic0";
- port@1 {
- status = "okay";
- };
};
&mshc_0 {
@@ -90,13 +90,6 @@
status = "okay";
phys = <&exynos_usbphy 2>, <&exynos_usbphy 3>;
phy-names = "hsic0", "hsic1";
-
- port@1 {
- status = "okay";
- };
- port@2 {
- status = "okay";
- };
};
&fimd {
@@ -619,12 +619,6 @@
clock-names = "usbhost";
phys = <&usb2_phy_gen 1>;
phy-names = "host";
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&usb2_phy_gen 1>;
- };
};
ohci: usb@12120000 {
@@ -636,12 +630,6 @@
clock-names = "usbhost";
phys = <&usb2_phy_gen 1>;
phy-names = "host";
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&usb2_phy_gen 1>;
- };
};
usb2_phy_gen: phy@12130000 {
@@ -182,13 +182,6 @@
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy 1>;
phy-names = "host";
-
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&usb2_phy 1>;
- };
};
usbhost1: usb@12120000 {
@@ -197,13 +190,6 @@
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy 1>;
phy-names = "host";
-
- #address-cells = <1>;
- #size-cells = <0>;
- port@0 {
- reg = <0>;
- phys = <&usb2_phy 1>;
- };
};
usb2_phy: phy@12130000 {
Remove custom port sub-nodes from EHCI/OHCI devices. This way boards can define sub-nodes for the USB devices using generic USB device bindings. Suggested-by: Måns Rullgård <mans@mansr.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> --- arch/arm/boot/dts/exynos4.dtsi | 24 ------------------- .../boot/dts/exynos4210-universal_c210.dts | 6 ----- arch/arm/boot/dts/exynos4412-itop-elite.dts | 7 ------ arch/arm/boot/dts/exynos4412-odroidu3.dts | 6 ----- arch/arm/boot/dts/exynos4412-odroidx.dts | 3 --- arch/arm/boot/dts/exynos4412-origen.dts | 7 ------ arch/arm/boot/dts/exynos5250.dtsi | 12 ---------- arch/arm/boot/dts/exynos54xx.dtsi | 14 ----------- 8 files changed, 79 deletions(-) -- 2.17.1