Message ID | 1367043180-6756-4-git-send-email-amarendra.xt@samsung.com |
---|---|
State | Accepted |
Commit | 9c50e35ff2f8ead8df5781988927b51ea03c6192 |
Headers | show |
Acked-by: Jaehoon Chung <jh80.chung@samsung.com> On 04/27/2013 03:12 PM, amar_g wrote: > From: Amar <amarendra.xt@samsung.com> > > This patch enumerates dwmci and set auto stop command during > dwmci initialisation. > EMMC read/write is not happening in current implementation > due to improper fifo size computation. Hence modified the fifo size > computation to resolve EMMC read write issues. > > Signed-off-by: Amar <amarendra.xt@samsung.com> > --- > Changes since V1: > 1)Created the macros RX_WMARK_SHIFT and RX_WMARK_MASK in header file. > > Changes since V2: > 1)Updation of commit message and resubmition of proper patch set. > > Changes since V3: > 1)Updated to use the macro DWMCI_CTRL_SEND_AS_CCSD instead of > the hard coded value (1 << 10). > > Changes since V4: > 1)Updated the function dwmci_send_cmd() to use get_timer() instead > of using mdelay(1). > > Changes since V5: > 1)Updated in response to review comments. > > Changes since V6: > No change. > > Changes since V7: > 1)Updated the function dwmci_setup_bus() to return 0 if (freq == 0). > This is to avoid the run time exception "raise:Signal # 8 caught". > > Changes since V8: > 1)Auto stop command is disabled, as this feature is not required. > > --- > drivers/mmc/dw_mmc.c | 21 ++++++++++++--------- > 1 files changed, 12 insertions(+), 9 deletions(-) > > diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c > index 4070d4e..1307b12 100644 > --- a/drivers/mmc/dw_mmc.c > +++ b/drivers/mmc/dw_mmc.c > @@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > unsigned int timeout = 100000; > u32 retry = 10000; > u32 mask, ctrl; > + ulong start = get_timer(0); > > while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { > - if (timeout == 0) { > + if (get_timer(start) > timeout) { > printf("Timeout on data busy\n"); > return TIMEOUT; > } > - timeout--; > } > > dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); > @@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, > if (data) > dwmci_prepare_data(host, data); > > - > dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg); > > if (data) > @@ -231,9 +230,8 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) > int timeout = 10000; > unsigned long sclk; > > - if (freq == host->clock) > + if ((freq == host->clock) || (freq == 0)) > return 0; > - > /* > * If host->mmc_clk didn't define, > * then assume that host->bus_hz is source clock value. > @@ -323,6 +321,9 @@ static int dwmci_init(struct mmc *mmc) > return -1; > } > > + /* Enumerate at 400KHz */ > + dwmci_setup_bus(host, mmc->f_min); > + > dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF); > dwmci_writel(host, DWMCI_INTMASK, 0); > > @@ -332,11 +333,13 @@ static int dwmci_init(struct mmc *mmc) > dwmci_writel(host, DWMCI_BMOD, 1); > > fifo_size = dwmci_readl(host, DWMCI_FIFOTH); > - if (host->fifoth_val) > + fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; > + if (host->fifoth_val) { > fifoth_val = host->fifoth_val; > - else > - fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) | > - TX_WMARK(fifo_size/2); > + } else { > + fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | > + TX_WMARK(fifo_size / 2); > + } > dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); > > dwmci_writel(host, DWMCI_CLKENA, 0); >
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 4070d4e..1307b12 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -129,13 +129,13 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, unsigned int timeout = 100000; u32 retry = 10000; u32 mask, ctrl; + ulong start = get_timer(0); while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) { - if (timeout == 0) { + if (get_timer(start) > timeout) { printf("Timeout on data busy\n"); return TIMEOUT; } - timeout--; } dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL); @@ -143,7 +143,6 @@ static int dwmci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, if (data) dwmci_prepare_data(host, data); - dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg); if (data) @@ -231,9 +230,8 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) int timeout = 10000; unsigned long sclk; - if (freq == host->clock) + if ((freq == host->clock) || (freq == 0)) return 0; - /* * If host->mmc_clk didn't define, * then assume that host->bus_hz is source clock value. @@ -323,6 +321,9 @@ static int dwmci_init(struct mmc *mmc) return -1; } + /* Enumerate at 400KHz */ + dwmci_setup_bus(host, mmc->f_min); + dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF); dwmci_writel(host, DWMCI_INTMASK, 0); @@ -332,11 +333,13 @@ static int dwmci_init(struct mmc *mmc) dwmci_writel(host, DWMCI_BMOD, 1); fifo_size = dwmci_readl(host, DWMCI_FIFOTH); - if (host->fifoth_val) + fifo_size = ((fifo_size & RX_WMARK_MASK) >> RX_WMARK_SHIFT) + 1; + if (host->fifoth_val) { fifoth_val = host->fifoth_val; - else - fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size/2 -1) | - TX_WMARK(fifo_size/2); + } else { + fifoth_val = MSIZE(0x2) | RX_WMARK(fifo_size / 2 - 1) | + TX_WMARK(fifo_size / 2); + } dwmci_writel(host, DWMCI_FIFOTH, fifoth_val); dwmci_writel(host, DWMCI_CLKENA, 0);