diff mbox series

[6/6] clk: ti: am43xx: drop idlest polling from gfx clkctrl clock

Message ID 1554365467-1325-7-git-send-email-t-kristo@ti.com
State New
Headers show
Series clk: ti: a few OMAP clock fixes | expand

Commit Message

Tero Kristo April 4, 2019, 8:11 a.m. UTC 
From: Eric Ruei <e-ruei1@ti.com>


The GFX modules on AM43xx SoCs have a hardreset line and are controlled
by a GFX reset line. Any clkctrl enable/disable operations cannot be
checked for module enabled/disabled status independent of the reset
operation, and this causes some unwanted timeouts in the kernel and
unbalanced states for the GFX clocks. These details should be handled
by the driver integration code itself.

Add the CLKF_NO_IDLEST flag to the GFX clkctrl clock so that these
module status checks are skipped.

Signed-off-by: Eric Ruei <e-ruei1@ti.com>

Signed-off-by: Tero Kristo <t-kristo@ti.com>

---
 drivers/clk/ti/clk-43xx-compat.c | 2 +-
 drivers/clk/ti/clk-43xx.c        | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
1.9.1

--
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diff mbox series

Patch

diff --git a/drivers/clk/ti/clk-43xx-compat.c b/drivers/clk/ti/clk-43xx-compat.c
index 5130398..ac8117d 100644
--- a/drivers/clk/ti/clk-43xx-compat.c
+++ b/drivers/clk/ti/clk-43xx-compat.c
@@ -65,7 +65,7 @@ 
 };
 
 static const struct omap_clkctrl_reg_data am4_gfx_l3_clkctrl_regs[] __initconst = {
-	{ AM4_GFX_CLKCTRL, NULL, CLKF_SW_SUP, "gfx_fck_div_ck" },
+	{ AM4_GFX_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "gfx_fck_div_ck" },
 	{ 0 },
 };
 
diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c
index 2782d91..9882a9b 100644
--- a/drivers/clk/ti/clk-43xx.c
+++ b/drivers/clk/ti/clk-43xx.c
@@ -73,7 +73,7 @@ 
 };
 
 static const struct omap_clkctrl_reg_data am4_gfx_l3_clkctrl_regs[] __initconst = {
-	{ AM4_GFX_L3_GFX_CLKCTRL, NULL, CLKF_SW_SUP, "gfx_fck_div_ck" },
+	{ AM4_GFX_L3_GFX_CLKCTRL, NULL, CLKF_SW_SUP | CLKF_NO_IDLEST, "gfx_fck_div_ck" },
 	{ 0 },
 };