Message ID | 20190309023209.6741-1-manivannan.sadhasivam@linaro.org |
---|---|
State | Accepted |
Commit | ee4c12f4390743013029cfe4f895d1becc35880b |
Headers | show |
Series | arm64: dts: freescale: Enable PCI-E controller for Oxalis board | expand |
On Sat, Mar 09, 2019 at 08:02:09AM +0530, Manivannan Sadhasivam wrote: > Enable PCI-E controller for Oxalis board based on NXP/Freescale LS1012a > SoC available as the Mini PCI-E connector on the bottom side. > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts index 760a3e258c96..5f9cde402744 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts @@ -87,6 +87,10 @@ status = "okay"; }; +&pcie { + status = "okay"; +}; + &sai2 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 816f3a4537e3..d48b0df1da6d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -474,7 +474,7 @@ interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; }; - pcie@3400000 { + pcie: pcie@3400000 { compatible = "fsl,ls1012a-pcie"; reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */
Enable PCI-E controller for Oxalis board based on NXP/Freescale LS1012a SoC available as the Mini PCI-E connector on the bottom side. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts | 4 ++++ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) -- 2.17.1