diff mbox series

[v3,4/4] rockchip: rk3399: Add Ficus EE board support

Message ID 20180927190301.9642-5-manivannan.sadhasivam@linaro.org
State Accepted
Commit 467877341a4169f1a8c50b7ebe4c0e6fd28da727
Headers show
Series Add Rock960 and Ficus 96Board support | expand

Commit Message

Manivannan Sadhasivam Sept. 27, 2018, 7:03 p.m. UTC 
Add board support for Ficus EE board from Vamrs. This board utilizes
common Rock960 family support.

Following peripherals are tested and known to work:
* Gigabit Ethernet
* USB 2.0
* MMC

Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
[Reworked based on common Rock960 family support]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---

Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3

Changes in v2: None

 arch/arm/dts/Makefile          |  1 +
 arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
 configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
 3 files changed, 150 insertions(+)
 create mode 100644 arch/arm/dts/rk3399-ficus.dts
 create mode 100644 configs/ficus-rk3399_defconfig

Comments

Simon Glass Oct. 2, 2018, 11:21 a.m. UTC | #1 
On 27 September 2018 at 12:03, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
> Add board support for Ficus EE board from Vamrs. This board utilizes
> common Rock960 family support.
>
> Following peripherals are tested and known to work:
> * Gigabit Ethernet
> * USB 2.0
> * MMC
>
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> [Reworked based on common Rock960 family support]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
>
> Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
>
> Changes in v2: None
>
>  arch/arm/dts/Makefile          |  1 +
>  arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
>  configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
>  3 files changed, 150 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-ficus.dts
>  create mode 100644 configs/ficus-rk3399_defconfig

Reviewed-by: Simon Glass <sjg@chromium.org>
Philipp Tomsich Oct. 3, 2018, 7:35 p.m. UTC | #2 
> Add board support for Ficus EE board from Vamrs. This board utilizes
> common Rock960 family support.
> 
> Following peripherals are tested and known to work:
> * Gigabit Ethernet
> * USB 2.0
> * MMC
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> [Reworked based on common Rock960 family support]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> 
> Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
> 
> Changes in v2: None
> 
>  arch/arm/dts/Makefile          |  1 +
>  arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
>  configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
>  3 files changed, 150 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-ficus.dts
>  create mode 100644 configs/ficus-rk3399_defconfig
> 

Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Ezequiel Garcia Dec. 4, 2018, 9:12 p.m. UTC | #3 
On Wed, 2018-10-03 at 21:35 +0200, Philipp Tomsich wrote:
> > Add board support for Ficus EE board from Vamrs. This board utilizes
> > common Rock960 family support.
> > 
> > Following peripherals are tested and known to work:
> > * Gigabit Ethernet
> > * USB 2.0
> > * MMC
> > 
> > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> > [Reworked based on common Rock960 family support]
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> > Reviewed-by: Simon Glass <sjg@chromium.org>
> > ---
> > 
> > Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
> > 
> > Changes in v2: None
> > 
> >  arch/arm/dts/Makefile          |  1 +
> >  arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
> >  configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
> >  3 files changed, 150 insertions(+)
> >  create mode 100644 arch/arm/dts/rk3399-ficus.dts
> >  create mode 100644 configs/ficus-rk3399_defconfig
> > 
> 
> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Two months have passed... guys, what's the problem with this series?

Regards,
Ezequiel
Philipp Tomsich Dec. 4, 2018, 9:21 p.m. UTC | #4 
Peter (Robinson) already asked: I had lost this series one during a rebase screw-up
and will send out the PR as soon as it’s through Travis-CI.

Thanks,
Philipp.

> On 04.12.2018, at 22:12, Ezequiel Garcia <ezequiel@collabora.com> wrote:
> 
> On Wed, 2018-10-03 at 21:35 +0200, Philipp Tomsich wrote:
>>> Add board support for Ficus EE board from Vamrs. This board utilizes
>>> common Rock960 family support.
>>> 
>>> Following peripherals are tested and known to work:
>>> * Gigabit Ethernet
>>> * USB 2.0
>>> * MMC
>>> 
>>> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
>>> [Reworked based on common Rock960 family support]
>>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>>> Reviewed-by: Simon Glass <sjg@chromium.org>
>>> ---
>>> 
>>> Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
>>> 
>>> Changes in v2: None
>>> 
>>> arch/arm/dts/Makefile          |  1 +
>>> arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
>>> configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
>>> 3 files changed, 150 insertions(+)
>>> create mode 100644 arch/arm/dts/rk3399-ficus.dts
>>> create mode 100644 configs/ficus-rk3399_defconfig
>>> 
>> 
>> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> 
> Two months have passed... guys, what's the problem with this series?
> 
> Regards,
> Ezequiel
> 
>
Ezequiel Garcia Dec. 4, 2018, 10:02 p.m. UTC | #5 
On Tue, 2018-12-04 at 22:21 +0100, Philipp Tomsich wrote:
> Peter (Robinson) already asked: I had lost this series one during a rebase screw-up
> and will send out the PR as soon as it’s through Travis-CI.
> 

Thanks for the quick reply.

Should you need anything from me or Mani, please let us know.

Thanks!
Eze
Philipp Tomsich Dec. 6, 2018, 2:39 p.m. UTC | #6 
Ezequiel,

> On 04.12.2018, at 23:02, Ezequiel Garcia <ezequiel@collabora.com> wrote:
> 
> On Tue, 2018-12-04 at 22:21 +0100, Philipp Tomsich wrote:
>> Peter (Robinson) already asked: I had lost this series one during a rebase screw-up
>> and will send out the PR as soon as it’s through Travis-CI.
>> 
> 
> Thanks for the quick reply.
> 
> Should you need anything from me or Mani, please let us know.

After sorting my git tree out, this is now waiting for a USB fix to be either waved
through by Marek (so I can apply it) or being applied by Marek.
The series does not pass Travis without this (and I darkly remember that I ran into
the same issue about 5 weeks back)…

It’s on u-boot-rockchip/master (together with the USB change), but I can’t send out 
the PR until the USB side is sorted.

Cheers,
Philipp.
Philipp Tomsich Dec. 6, 2018, 3:02 p.m. UTC | #7 
> Add board support for Ficus EE board from Vamrs. This board utilizes
> common Rock960 family support.
> 
> Following peripherals are tested and known to work:
> * Gigabit Ethernet
> * USB 2.0
> * MMC
> 
> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
> [Reworked based on common Rock960 family support]
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Reviewed-by: Simon Glass <sjg@chromium.org>
> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
> Changes in v3: Modified the DRAM config header from LPDDR3 to DDR3
> 
> Changes in v2: None
> 
>  arch/arm/dts/Makefile          |  1 +
>  arch/arm/dts/rk3399-ficus.dts  | 78 ++++++++++++++++++++++++++++++++++
>  configs/ficus-rk3399_defconfig | 71 +++++++++++++++++++++++++++++++
>  3 files changed, 150 insertions(+)
>  create mode 100644 arch/arm/dts/rk3399-ficus.dts
>  create mode 100644 configs/ficus-rk3399_defconfig
> 

Applied to u-boot-rockchip, thanks!
diff mbox series

Patch

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 9b891826b73..e2bd9822aa2 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -42,6 +42,7 @@  dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-minnie.dtb \
 	rk3288-vyasa.dtb \
 	rk3328-evb.dtb \
+	rk3399-ficus.dtb \
 	rk3368-lion.dtb \
 	rk3368-sheep.dtb \
 	rk3368-geekbox.dtb \
diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
new file mode 100644
index 00000000000..4af0e4e3834
--- /dev/null
+++ b/arch/arm/dts/rk3399-ficus.dts
@@ -0,0 +1,78 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
+ *
+ * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw
+ */
+
+/dts-v1/;
+#include "rk3399-rock960.dtsi"
+#include "rk3399-sdram-ddr3-1600.dtsi"
+
+/ {
+	model = "96boards RK3399 Ficus";
+	compatible = "vamrs,ficus", "rockchip,rk3399";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+};
+
+&gmac {
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	clock_in_out = "input";
+	phy-supply = <&vcc3v3_sys>;
+	phy-mode = "rgmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
+&pcie0 {
+	ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
+};
+
+&pinctrl {
+	gmac {
+		rgmii_sleep_pins: rgmii-sleep-pins {
+			rockchip,pins =
+				<3 15 RK_FUNC_GPIO &pcfg_output_low>;
+		};
+	};
+
+	pcie {
+		pcie_drv: pcie-drv {
+			rockchip,pins =
+				<1 24 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+	};
+
+	usb2 {
+		host_vbus_drv: host-vbus-drv {
+			rockchip,pins =
+				<4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&vcc3v3_pcie {
+	gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+};
+
+&vcc5v0_host {
+	gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
+};
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
new file mode 100644
index 00000000000..e890bc25238
--- /dev/null
+++ b/configs/ficus-rk3399_defconfig
@@ -0,0 +1,71 @@ 
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_ROCK960_RK3399=y
+CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_STACK_R_ADDR=0x80000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus"
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.py"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_RGMII=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_ROCKCHIP_RK3399=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_STORAGE=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_ERRNO_STR=y