Message ID | 20180921102155.22839-38-kishon@ti.com |
---|---|
State | New |
Headers | show
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[209.132.180.67]) by mx.google.com with ESMTP id l9-v6si28029894pfe.11.2018.09.21.03.25.37; Fri, 21 Sep 2018 03:25:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=DBry1INq; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390326AbeIUQNr (ORCPT <rfc822;igor.opaniuk@linaro.org> + 32 others); Fri, 21 Sep 2018 12:13:47 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:46458 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389264AbeIUQNq (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Fri, 21 Sep 2018 12:13:46 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w8LAPB6A008174; Fri, 21 Sep 2018 05:25:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1537525511; bh=+EYr+DKnTLrhAJbl6n8B3m2RDG0kHLAobqVuL07Op2E=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=DBry1INqH9vjNuULwvgOqlLshEt4ujq215x7iZSZ817h+cbJN83TKjHXUt3wWuZdd QG6y+PCKhhLpmDJbCPXNGZeBzTrF3LnNNWg2/9IiP8u93o4cUf37Vul2vQ0pZ3IuLU Arrz4Uc75L/wiCRG7K7gljM+F3DiKnkfmL0aFl9s= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8LAPBKo032206; Fri, 21 Sep 2018 05:25:11 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Fri, 21 Sep 2018 05:25:10 -0500 Received: from dlep33.itg.ti.com (157.170.170.75) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Fri, 21 Sep 2018 05:25:10 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w8LAMEtf032280; Fri, 21 Sep 2018 05:25:06 -0500 From: Kishon Vijay Abraham I <kishon@ti.com> To: Jingoo Han <jingoohan1@gmail.com>, Joao Pinto <Joao.Pinto@synopsys.com>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Murali Karicheri <m-karicheri2@ti.com>, Kishon Vijay Abraham I <kishon@ti.com>, <Gustavo.Pimentel@synopsys.com> CC: Mark Rutland <mark.rutland@arm.com>, Santosh Shilimkar <ssantosh@kernel.org>, Tero Kristo <t-kristo@ti.com>, Nishanth Menon <nm@ti.com>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, Benoit Parrot <bparrot@ti.com> Subject: [RFC PATCH 37/40] arm64: dts: k3-am6: Add Main System Control Module node Date: Fri, 21 Sep 2018 15:51:52 +0530 Message-ID: <20180921102155.22839-38-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180921102155.22839-1-kishon@ti.com> References: <20180921102155.22839-1-kishon@ti.com> MIME-Version: 1.0 Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org |
Series |
Cleanup pci-keystone.c and Add AM654 PCIe Support
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diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 2df4acb198bd..957c9125a453 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -6,6 +6,11 @@ */ &cbass_main { + scm_conf: scm_conf@100000 { + compatible = "syscon"; + reg = <0 0x00100000 0 0x1c000>; + }; + gic500: interrupt-controller@1800000 { compatible = "arm,gic-v3"; #address-cells = <2>;