Message ID | 20180724171224.17363-4-ard.biesheuvel@linaro.org |
---|---|
State | New |
Headers | show
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[212.83.80.182]) by smtp.gmail.com with ESMTPSA id j50-v6sm11267948ede.0.2018.07.24.10.12.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Jul 2018 10:12:32 -0700 (PDT) From: Ard Biesheuvel <ard.biesheuvel@linaro.org> To: linux-crypto@vger.kernel.org Cc: herbert@gondor.apana.org.au, will.deacon@arm.com, dave.martin@arm.com, vakul.garg@nxp.com, bigeasy@linutronix.de, Ard Biesheuvel <ard.biesheuvel@linaro.org> Subject: [PATCH 3/4] crypto/arm64: sha1 - reduce performance impact of NEON yield checks Date: Tue, 24 Jul 2018 19:12:23 +0200 Message-Id: <20180724171224.17363-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180724171224.17363-1-ard.biesheuvel@linaro.org> References: <20180724171224.17363-1-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: <linux-crypto.vger.kernel.org> X-Mailing-List: linux-crypto@vger.kernel.org |
Series |
crypto/arm64: reduce impact of NEON yield checks
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diff --git a/arch/arm64/crypto/sha1-ce-core.S b/arch/arm64/crypto/sha1-ce-core.S index 78eb35fb5056..f592c55218d0 100644 --- a/arch/arm64/crypto/sha1-ce-core.S +++ b/arch/arm64/crypto/sha1-ce-core.S @@ -129,6 +129,9 @@ CPU_LE( rev32 v11.16b, v11.16b ) add dgbv.2s, dgbv.2s, dg1v.2s add dgav.4s, dgav.4s, dg0v.4s + tst w21, #0x3 // yield only every 4 blocks + b.ne 1b + cbz w21, 3f if_will_cond_yield_neon
Only perform the NEON yield check for every 4 blocks of input, to prevent taking a considerable performance hit on cores with very fast crypto instructions and comparatively slow memory accesses, such as the Cortex-A53. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> --- arch/arm64/crypto/sha1-ce-core.S | 3 +++ 1 file changed, 3 insertions(+) -- 2.11.0