| Message ID | fbb4d14a83ed80e9740c042cd9df58b8132b4c91.1520344489.git-series.maxime.ripard@bootlin.com |
|---|---|
| State | Accepted |
| Commit | 88fe315d2c0a397ef42d7639addab0e021ae911d |
| Headers | show |
| Series | [v3,1/7] drm/sun4i: tcon: Add TRI finish interrupt for vblank | expand |
Hi, On Thu, Mar 22, 2018 at 10:23:32AM +0800, Chen-Yu Tsai wrote: > On Tue, Mar 6, 2018 at 9:56 PM, Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > From: Maxime Ripard <maxime.ripard@free-electrons.com> > > > > The A33 has a MIPI-DSI block, along with its D-PHY. Let's add it in order > > to use it in the relevant boards. > > > > Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> > > --- > > arch/arm/boot/dts/sun8i-a33.dtsi | 44 +++++++++++++++++++++++++++++++++- > > 1 file changed, 44 insertions(+) > > > > diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi > > index 50eb84fa246a..94cfa7b1bbfa 100644 > > --- a/arch/arm/boot/dts/sun8i-a33.dtsi > > +++ b/arch/arm/boot/dts/sun8i-a33.dtsi > > @@ -236,6 +236,11 @@ > > #address-cells = <1>; > > #size-cells = <0>; > > reg = <1>; > > + > > + tcon0_out_dsi0: endpoint@1 { > > + reg = <1>; > > + remote-endpoint = <&dsi0_in_tcon0>; > > + }; > > }; > > }; > > }; > > @@ -280,6 +285,45 @@ > > #io-channel-cells = <0>; > > }; > > > > + dsi0: dsi@1ca0000 { > > Nit: There's only one so you don't need the numbered suffix. I'll fix it. > Also, is "dsi" specific enough, or should we use "mipi-dsi" If we were to be pedantic about it, that would even be MIPI-DSI2, but I'm not sure it's worth it to be honest. > > + compatible = "allwinner,sun6i-a31-mipi-dsi"; > > + reg = <0x01ca0000 0x1000>; > > + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&ccu CLK_BUS_MIPI_DSI>, > > + <&ccu CLK_DSI_SCLK>; > > + clock-names = "bus", "mod"; > > + resets = <&ccu RST_BUS_MIPI_DSI>; > > + phys = <&dphy0>; > > + phy-names = "dphy"; > > + status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + reg = <0>; > > + > > + dsi0_in_tcon0: endpoint { > > + remote-endpoint = <&tcon0_out_dsi0>; > > + }; > > + }; > > + }; > > + }; > > + > > + dphy0: d-phy@1ca1000 { > > Same nit, and "dsi-phy" would be better. D-PHY is one of the MIPI standards that can be used with DSI, but it doesn't mean DSI-PHY. You also have C-PHY (that can be used with DSI as well) and M-PHY (than can be used with UniPro and CSI3). So, no, it really is a D-PHY controller :) Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 50eb84fa246a..94cfa7b1bbfa 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -236,6 +236,11 @@ #address-cells = <1>; #size-cells = <0>; reg = <1>; + + tcon0_out_dsi0: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi0_in_tcon0>; + }; }; }; }; @@ -280,6 +285,45 @@ #io-channel-cells = <0>; }; + dsi0: dsi@1ca0000 { + compatible = "allwinner,sun6i-a31-mipi-dsi"; + reg = <0x01ca0000 0x1000>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_SCLK>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy0>; + phy-names = "dphy"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + dsi0_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_dsi0>; + }; + }; + }; + }; + + dphy0: d-phy@1ca1000 { + compatible = "allwinner,sun6i-a31-mipi-dphy"; + reg = <0x01ca1000 0x1000>; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_DSI_DPHY>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + status = "disabled"; + #phy-cells = <0>; + }; + fe0: display-frontend@1e00000 { compatible = "allwinner,sun8i-a33-display-frontend"; reg = <0x01e00000 0x20000>;