Message ID | 1517492678-767-2-git-send-email-fabrice.gasnier@st.com |
---|---|
State | New |
Headers | show |
Series | [1/3] dt-bindings: pwm-stm32-lp: add #pwm-cells | expand |
On Thu, Feb 01, 2018 at 02:44:36PM +0100, Fabrice Gasnier wrote: > From: Gerald Baeza <gerald.baeza@st.com> > > STM32 Low-Power Timer supports generic 3 cells pwm to encode > PWM number, period and polarity. > > Signed-off-by: Gerald Baeza <gerald.baeza@st.com> > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> > --- > Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt | 3 +++ > 1 file changed, 3 insertions(+) Reviewed-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt index f8338d1..bd23302 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt @@ -7,6 +7,8 @@ See ../mfd/stm32-lptimer.txt for details about the parent node. Required parameters: - compatible: Must be "st,stm32-pwm-lp". +- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells + bindings defined in pwm.txt. Optional properties: - pinctrl-names: Set to "default". @@ -18,6 +20,7 @@ Example: ... pwm { compatible = "st,stm32-pwm-lp"; + #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&lppwm1_pins>; };