| Message ID | 20171214201546.21942-1-bjorn.andersson@linaro.org |
|---|---|
| State | Accepted |
| Commit | 9d32497361ff89d2fc8306407de6f04b2bfb2836 |
| Headers | show |
| Series | rpmsg: glink: smem: Ensure ordering during tx | expand |
On 12/14/2017 12:15 PM, Bjorn Andersson wrote: > Ensure the ordering of the fifo write and the update of the write index, > so that the index is not updated before the data has landed in the fifo. > > Reported-by: Arun Kumar Neelakantam <aneela@codeaurora.org> > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- Acked-By: Chris Lew <clew@codeaurora.org> -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c index 057528e23d3a..892f2b92a4d8 100644 --- a/drivers/rpmsg/qcom_glink_smem.c +++ b/drivers/rpmsg/qcom_glink_smem.c @@ -183,6 +183,9 @@ static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe, if (head >= pipe->native.length) head -= pipe->native.length; + /* Ensure ordering of fifo and head update */ + wmb(); + *pipe->head = cpu_to_le32(head); }
Ensure the ordering of the fifo write and the update of the write index, so that the index is not updated before the data has landed in the fifo. Reported-by: Arun Kumar Neelakantam <aneela@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- drivers/rpmsg/qcom_glink_smem.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.15.0 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html