Message ID | 20171206121139.18936-2-srinivas.kandagatla@linaro.org |
---|---|
State | Accepted |
Commit | d8e488e8242ecf129eebc440c92d800a99ca109d |
Headers | show |
Series | [1/2] clk: qcom: msm8916: fix mnd_width for codec_digcodec | expand |
On 12/06, srinivas.kandagatla@linaro.org wrote: > From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > > This patch fixes missing mnd_width for codec_digital clk, this is now set to > 8 inline with datasheet. > > Fixes: 3966fab8b6ab ("clk: qcom: Add MSM8916 Global Clock Controller support") > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c index 506e0736bf92..d973aeaab943 100644 --- a/drivers/clk/qcom/gcc-msm8916.c +++ b/drivers/clk/qcom/gcc-msm8916.c @@ -1443,6 +1443,7 @@ static const struct freq_tbl ftbl_codec_clk[] = { static struct clk_rcg2 codec_digcodec_clk_src = { .cmd_rcgr = 0x1c09c, + .mnd_width = 8, .hid_width = 5, .parent_map = gcc_xo_gpll1_emclk_sleep_map, .freq_tbl = ftbl_codec_clk,