@@ -909,6 +909,7 @@ static void __init omap_4430sdp_init(void)
MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
.atag_offset = 0x100,
+ .smp = smp_ops(omap4_smp_ops),
.reserve = omap_reserve,
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
@@ -127,6 +127,7 @@ static const char *omap4_boards_compat[] __initdata = {
DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
.reserve = omap_reserve,
+ .smp = smp_ops(omap4_smp_ops),
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
.init_irq = omap_gic_of_init,
@@ -147,6 +148,7 @@ static const char *omap5_boards_compat[] __initdata = {
DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
.reserve = omap_reserve,
+ .smp = smp_ops(omap4_smp_ops),
.map_io = omap5_map_io,
.init_early = omap5_init_early,
.init_irq = omap_gic_of_init,
@@ -518,6 +518,7 @@ static void __init omap4_panda_init(void)
MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
/* Maintainer: David Anders - Texas Instruments Inc */
.atag_offset = 0x100,
+ .smp = smp_ops(omap4_smp_ops),
.reserve = omap_reserve,
.map_io = omap4_map_io,
.init_early = omap4430_init_early,
@@ -278,6 +278,11 @@ extern void omap_secondary_startup(void);
extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
extern void omap_auxcoreboot_addr(u32 cpu_addr);
extern u32 omap_read_auxcoreboot0(void);
+
+extern void omap4_cpu_die(unsigned int cpu);
+
+extern struct smp_operations omap4_smp_ops;
+
extern void omap5_secondary_startup(void);
#endif
@@ -26,16 +26,11 @@
#include "powerdomain.h"
-int platform_cpu_kill(unsigned int cpu)
-{
- return 1;
-}
-
/*
* platform-specific code to shutdown a CPU
* Called with IRQs disabled
*/
-void __ref platform_cpu_die(unsigned int cpu)
+void __ref omap4_cpu_die(unsigned int cpu)
{
unsigned int boot_cpu = 0;
void __iomem *base = omap_get_wakeupgen_base();
@@ -75,12 +70,3 @@ void __ref platform_cpu_die(unsigned int cpu)
pr_debug("CPU%u: spurious wakeup call\n", cpu);
}
}
-
-int platform_cpu_disable(unsigned int cpu)
-{
- /*
- * we don't allow CPU 0 to be shutdown (it is still too special
- * e.g. clock tick interrupts)
- */
- return cpu == 0 ? -EPERM : 0;
-}
@@ -49,7 +49,7 @@ void __iomem *omap4_get_scu_base(void)
return scu_base;
}
-void __cpuinit platform_secondary_init(unsigned int cpu)
+static void __cpuinit omap4_secondary_init(unsigned int cpu)
{
/*
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
@@ -77,7 +77,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
spin_unlock(&boot_lock);
}
-int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
+static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
static struct clockdomain *cpu1_clkdm;
static bool booted;
@@ -165,7 +165,7 @@ static void __init wakeup_secondary(void)
* Initialise the CPU possible map early - this describes the CPUs
* which may be present or become present in the system.
*/
-void __init smp_init_cpus(void)
+static void __init omap4_smp_init_cpus(void)
{
unsigned int i = 0, ncores = 1, cpu_id;
@@ -196,7 +196,7 @@ void __init smp_init_cpus(void)
set_smp_cross_call(gic_raise_softirq);
}
-void __init platform_smp_prepare_cpus(unsigned int max_cpus)
+static void __init omap4_smp_prepare_cpus(unsigned int max_cpus)
{
/*
@@ -207,3 +207,13 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
scu_enable(scu_base);
wakeup_secondary();
}
+
+struct smp_operations omap4_smp_ops __initdata = {
+ .smp_init_cpus = omap4_smp_init_cpus,
+ .smp_prepare_cpus = omap4_smp_prepare_cpus,
+ .smp_secondary_init = omap4_secondary_init,
+ .smp_boot_secondary = omap4_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+ .cpu_die = omap4_cpu_die,
+#endif
+};