| Message ID | CAD57uCcBJ7GUGpUqWtTGE9PesMXWfjPOi_0CvtiDWTCyNW6_=Q@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
On 06/27/2017 06:19 AM, Yvan Roux wrote: > diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt > index 942a7d5..0fd1bfa 100644 > --- a/gcc/config/aarch64/aarch64.opt > +++ b/gcc/config/aarch64/aarch64.opt > @@ -146,7 +146,7 @@ EnumValue > Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64) > > mpc-relative-literal-loads > -Target Report Save Var(pcrelative_literal_loads) Init(2) Save > +Target Report Var(pcrelative_literal_loads) Init(2) Save > PC relative literal loads. > > msign-return-address= I think this qualifies as an obvious fix. I can't approve it if it isn't, anyway.... ;-) > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index d1e097b..6e0e776 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -595,7 +595,9 @@ Objective-C and Objective-C++ Dialects}. > -mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol > -mlow-precision-sqrt -mno-low-precision-sqrt@gol > -mlow-precision-div -mno-low-precision-div @gol > --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} > +-mpc-relative-literal-loads -mno-pc-relative-literal-loads @gol For options that have both positive and negative variants, we should only be listing the one that is not the default in the Option Summary table. Can you please remove the existing redundant options listed for AArch64, instead of adding a new one? > +-msign-return-address=@var{scope} @gol > +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} -moverride=@var{string}} > > @emph{Adapteva Epiphany Options} > @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol > @@ -14158,8 +14160,10 @@ across releases. > This option is only intended to be useful when developing GCC. > > @item -mpc-relative-literal-loads > +@item -mno-pc-relative-literal-loads It is OK to list both the positive and negative forms in the full description, but in a table with multiple items in the same entry, the second and subsequent ones should use @itemx markup instead of @item. > @opindex mpc-relative-literal-loads > -Enable PC-relative literal loads. With this option literal pools are > +@opindex mno-pc-relative-literal-loads > +Enable or disable PC-relative literal loads. With this option literal pools are > accessed using a single instruction and emitted after each function. This > limits the maximum size of functions to 1MB. This is enabled by default for > @option{-mcmodel=tiny}. -Sandra
Hi Sandra, On 27 June 2017 at 18:05, Sandra Loosemore <sandra@codesourcery.com> wrote: > On 06/27/2017 06:19 AM, Yvan Roux wrote: > >> diff --git a/gcc/config/aarch64/aarch64.opt >> b/gcc/config/aarch64/aarch64.opt >> index 942a7d5..0fd1bfa 100644 >> --- a/gcc/config/aarch64/aarch64.opt >> +++ b/gcc/config/aarch64/aarch64.opt >> @@ -146,7 +146,7 @@ EnumValue >> Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64) >> >> mpc-relative-literal-loads >> -Target Report Save Var(pcrelative_literal_loads) Init(2) Save >> +Target Report Var(pcrelative_literal_loads) Init(2) Save >> PC relative literal loads. >> >> msign-return-address= > > > I think this qualifies as an obvious fix. I can't approve it if it isn't, > anyway.... ;-) Ok, I'll commit it separately unless there is an objection to its obviousness. >> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi >> index d1e097b..6e0e776 100644 >> --- a/gcc/doc/invoke.texi >> +++ b/gcc/doc/invoke.texi >> @@ -595,7 +595,9 @@ Objective-C and Objective-C++ Dialects}. >> -mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol >> -mlow-precision-sqrt -mno-low-precision-sqrt@gol >> -mlow-precision-div -mno-low-precision-div @gol >> --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} >> +-mpc-relative-literal-loads -mno-pc-relative-literal-loads @gol > > > For options that have both positive and negative variants, we should only be > listing the one that is not the default in the Option Summary table. Can > you please remove the existing redundant options listed for AArch64, instead > of adding a new one? > >> +-msign-return-address=@var{scope} @gol >> +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} >> -moverride=@var{string}} >> >> @emph{Adapteva Epiphany Options} >> @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol >> @@ -14158,8 +14160,10 @@ across releases. >> This option is only intended to be useful when developing GCC. >> >> @item -mpc-relative-literal-loads >> +@item -mno-pc-relative-literal-loads > > > It is OK to list both the positive and negative forms in the full > description, but in a table with multiple items in the same entry, the > second and subsequent ones should use @itemx markup instead of @item. > >> @opindex mpc-relative-literal-loads >> -Enable PC-relative literal loads. With this option literal pools are >> +@opindex mno-pc-relative-literal-loads >> +Enable or disable PC-relative literal loads. With this option literal >> pools are >> accessed using a single instruction and emitted after each function. >> This >> limits the maximum size of functions to 1MB. This is enabled by default >> for >> @option{-mcmodel=tiny}. OK, here is the new patch with the comments addressed. I've spotted that there is also some m / -mno options at least in the ARM section, I'll make another patch to fix that. Thanks Yvan > > -Sandra >diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d1e097b..e1bb8a8 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -587,15 +587,14 @@ Objective-C and Objective-C++ Dialects}. -mgeneral-regs-only @gol -mcmodel=tiny -mcmodel=small -mcmodel=large @gol -mstrict-align @gol --momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol +-momit-leaf-frame-pointer @gol -mtls-dialect=desc -mtls-dialect=traditional @gol -mtls-size=@var{size} @gol --mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol --mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol --mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol --mlow-precision-sqrt -mno-low-precision-sqrt@gol --mlow-precision-div -mno-low-precision-div @gol --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} +-mfix-cortex-a53-835769 -mfix-cortex-a53-843419 @gol +-mlow-precision-recip-sqrt -mlow-precision-sqrt -mlow-precision-div @gol +-mpc-relative-literal-loads @gol +-msign-return-address=@var{scope} @gol +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} -moverride=@var{string}} @emph{Adapteva Epiphany Options} @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol @@ -14158,8 +14157,10 @@ across releases. This option is only intended to be useful when developing GCC. @item -mpc-relative-literal-loads +@itemx -mno-pc-relative-literal-loads @opindex mpc-relative-literal-loads -Enable PC-relative literal loads. With this option literal pools are +@opindex mno-pc-relative-literal-loads +Enable or disable PC-relative literal loads. With this option literal pools are accessed using a single instruction and emitted after each function. This limits the maximum size of functions to 1MB. This is enabled by default for @option{-mcmodel=tiny}.
On 06/28/2017 01:28 AM, Yvan Roux wrote: > Hi Sandra, > > [snip] > > OK, here is the new patch with the comments addressed. I've spotted > that there is also some m / -mno options at least in the ARM section, > I'll make another patch to fix that. This version looks fine. Thanks for taking care of this! -Sandra
On 28/06/17 08:28, Yvan Roux wrote: > Hi Sandra, > > On 27 June 2017 at 18:05, Sandra Loosemore <sandra@codesourcery.com> wrote: >> On 06/27/2017 06:19 AM, Yvan Roux wrote: >> >>> diff --git a/gcc/config/aarch64/aarch64.opt >>> b/gcc/config/aarch64/aarch64.opt >>> index 942a7d5..0fd1bfa 100644 >>> --- a/gcc/config/aarch64/aarch64.opt >>> +++ b/gcc/config/aarch64/aarch64.opt >>> @@ -146,7 +146,7 @@ EnumValue >>> Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64) >>> >>> mpc-relative-literal-loads >>> -Target Report Save Var(pcrelative_literal_loads) Init(2) Save >>> +Target Report Var(pcrelative_literal_loads) Init(2) Save >>> PC relative literal loads. >>> >>> msign-return-address= >> >> >> I think this qualifies as an obvious fix. I can't approve it if it isn't, >> anyway.... ;-) > > Ok, I'll commit it separately unless there is an objection to its obviousness. > >>> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi >>> index d1e097b..6e0e776 100644 >>> --- a/gcc/doc/invoke.texi >>> +++ b/gcc/doc/invoke.texi >>> @@ -595,7 +595,9 @@ Objective-C and Objective-C++ Dialects}. >>> -mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol >>> -mlow-precision-sqrt -mno-low-precision-sqrt@gol >>> -mlow-precision-div -mno-low-precision-div @gol >>> --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} >>> +-mpc-relative-literal-loads -mno-pc-relative-literal-loads @gol >> >> >> For options that have both positive and negative variants, we should only be >> listing the one that is not the default in the Option Summary table. Can >> you please remove the existing redundant options listed for AArch64, instead >> of adding a new one? >> >>> +-msign-return-address=@var{scope} @gol >>> +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} >>> -moverride=@var{string}} >>> >>> @emph{Adapteva Epiphany Options} >>> @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol >>> @@ -14158,8 +14160,10 @@ across releases. >>> This option is only intended to be useful when developing GCC. >>> >>> @item -mpc-relative-literal-loads >>> +@item -mno-pc-relative-literal-loads >> >> >> It is OK to list both the positive and negative forms in the full >> description, but in a table with multiple items in the same entry, the >> second and subsequent ones should use @itemx markup instead of @item. >> >>> @opindex mpc-relative-literal-loads >>> -Enable PC-relative literal loads. With this option literal pools are >>> +@opindex mno-pc-relative-literal-loads >>> +Enable or disable PC-relative literal loads. With this option literal >>> pools are >>> accessed using a single instruction and emitted after each function. >>> This >>> limits the maximum size of functions to 1MB. This is enabled by default >>> for >>> @option{-mcmodel=tiny}. > > OK, here is the new patch with the comments addressed. I've spotted > that there is also some m / -mno options at least in the ARM section, > I'll make another patch to fix that. > > Thanks > Yvan > OK. R. > >> >> -Sandra >> >> >> fix-aarch64-opt.patch >> >> >> diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi >> index d1e097b..e1bb8a8 100644 >> --- a/gcc/doc/invoke.texi >> +++ b/gcc/doc/invoke.texi >> @@ -587,15 +587,14 @@ Objective-C and Objective-C++ Dialects}. >> -mgeneral-regs-only @gol >> -mcmodel=tiny -mcmodel=small -mcmodel=large @gol >> -mstrict-align @gol >> --momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol >> +-momit-leaf-frame-pointer @gol >> -mtls-dialect=desc -mtls-dialect=traditional @gol >> -mtls-size=@var{size} @gol >> --mfix-cortex-a53-835769 -mno-fix-cortex-a53-835769 @gol >> --mfix-cortex-a53-843419 -mno-fix-cortex-a53-843419 @gol >> --mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol >> --mlow-precision-sqrt -mno-low-precision-sqrt@gol >> --mlow-precision-div -mno-low-precision-div @gol >> --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} >> +-mfix-cortex-a53-835769 -mfix-cortex-a53-843419 @gol >> +-mlow-precision-recip-sqrt -mlow-precision-sqrt -mlow-precision-div @gol >> +-mpc-relative-literal-loads @gol >> +-msign-return-address=@var{scope} @gol >> +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} -moverride=@var{string}} >> >> @emph{Adapteva Epiphany Options} >> @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol >> @@ -14158,8 +14157,10 @@ across releases. >> This option is only intended to be useful when developing GCC. >> >> @item -mpc-relative-literal-loads >> +@itemx -mno-pc-relative-literal-loads >> @opindex mpc-relative-literal-loads >> -Enable PC-relative literal loads. With this option literal pools are >> +@opindex mno-pc-relative-literal-loads >> +Enable or disable PC-relative literal loads. With this option literal pools are >> accessed using a single instruction and emitted after each function. This >> limits the maximum size of functions to 1MB. This is enabled by default for >> @option{-mcmodel=tiny}.
diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index 942a7d5..0fd1bfa 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -146,7 +146,7 @@ EnumValue Enum(aarch64_abi) String(lp64) Value(AARCH64_ABI_LP64) mpc-relative-literal-loads -Target Report Save Var(pcrelative_literal_loads) Init(2) Save +Target Report Var(pcrelative_literal_loads) Init(2) Save PC relative literal loads. msign-return-address= diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d1e097b..6e0e776 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -595,7 +595,9 @@ Objective-C and Objective-C++ Dialects}. -mlow-precision-recip-sqrt -mno-low-precision-recip-sqrt@gol -mlow-precision-sqrt -mno-low-precision-sqrt@gol -mlow-precision-div -mno-low-precision-div @gol --march=@var{name} -mcpu=@var{name} -mtune=@var{name}} +-mpc-relative-literal-loads -mno-pc-relative-literal-loads @gol +-msign-return-address=@var{scope} @gol +-march=@var{name} -mcpu=@var{name} -mtune=@var{name} -moverride=@var{string}} @emph{Adapteva Epiphany Options} @gccoptlist{-mhalf-reg-file -mprefer-short-insn-regs @gol @@ -14158,8 +14160,10 @@ across releases. This option is only intended to be useful when developing GCC. @item -mpc-relative-literal-loads +@item -mno-pc-relative-literal-loads @opindex mpc-relative-literal-loads -Enable PC-relative literal loads. With this option literal pools are +@opindex mno-pc-relative-literal-loads +Enable or disable PC-relative literal loads. With this option literal pools are accessed using a single instruction and emitted after each function. This limits the maximum size of functions to 1MB. This is enabled by default for @option{-mcmodel=tiny}.
Hi, I just noticed that some AArch64 options (-mpc-relative-literal-loads, -msign-return-address=scope and -moverride=string) are missing in the option summary part of the manual: https://gcc.gnu.org/onlinedocs/gcc/Option-Summary.html#Option-Summary and that the "-no" version of -mpc-relative-literal-loads is missing in AArch64 options page: https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html#AArch64-Options This patch fixes these issues and remove a redundant "Save" property in mpc-relative-literal-loads description. Tested by re-generating the manual, Ok for trunk ? Thanks Yvan gcc/ChangeLog 2017-06-27 Yvan Roux <yvan.roux@linaro.org> * config/aarch64/aarch64.opt (mpc-relative-literal-loads): Remove redundant property. * doc/invoke.texi (AArch64): Add missing options.