Message ID | eccd7a0880d06a073646d6cc8d9c8168f3637c27.1497004220.git.Richard.Earnshaw@arm.com |
---|---|
State | New |
Headers | show
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[209.132.180.131]) by mx.google.com with ESMTPS id a124si7205977pgc.127.2017.06.09.05.56.59 for <patch@linaro.org> (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 09 Jun 2017 05:56:59 -0700 (PDT) Received-SPF: pass (google.com: domain of gcc-patches-return-455527-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org; spf=pass (google.com: domain of gcc-patches-return-455527-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom=gcc-patches-return-455527-patch=linaro.org@gcc.gnu.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; q=dns; s= default; b=QYdAo76KLhdqRCIxovg0zpWnh/G9DH6A0Q0QNMuSJAusGafsuan0U 1Wwz6n9vduJH+4dp8o+UewTDPiuPGWL/lptcyeowDSur0f1hMde0NQYuZ3uaXiS7 0KWGBLo27ROpjLTVCpEvxN8Y5Pr6Oe/hKl2cOw3vjOOywHEHYgmyk4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references:mime-version:content-type; s=default; bh=ZpXBcXgZS1QYnmGzZJ3hR+W6qM4=; b=cOuIG3/Vbqm6XVrs8IkdOwnL10iV ovJ3bkARte1bWdJhjdxmlJoJrAmFz2gJG5EqrfOeOX3rwC+z7JDpk5wuUkukTC+4 g2aIJ6geIJc8DnvToCPSWZHSD1JvrH8pvYUxQ11VS2pjjfrOy6g+aiwlIl4jwq9A Aa+sY5cWo/1k6KM= Received: (qmail 81661 invoked by alias); 9 Jun 2017 12:54:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: <gcc-patches.gcc.gnu.org> List-Unsubscribe: <mailto:gcc-patches-unsubscribe-patch=linaro.org@gcc.gnu.org> List-Archive: <http://gcc.gnu.org/ml/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-help@gcc.gnu.org> Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 81060 invoked by uid 89); 9 Jun 2017 12:54:24 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS, T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 09 Jun 2017 12:54:19 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1F451610; Fri, 9 Jun 2017 05:54:22 -0700 (PDT) Received: from e105689-lin.cambridge.arm.com (e105689-lin.cambridge.arm.com [10.2.207.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3F16E3F3E1; Fri, 9 Jun 2017 05:54:22 -0700 (PDT) From: Richard Earnshaw <Richard.Earnshaw@arm.com> To: gcc-patches@gcc.gnu.org Cc: Richard Earnshaw <Richard.Earnshaw@arm.com> Subject: [PATCH 19/30] [arm] Explicitly set .fpu in cmse_nonsecure_call.S Date: Fri, 9 Jun 2017 13:53:48 +0100 Message-Id: <eccd7a0880d06a073646d6cc8d9c8168f3637c27.1497004220.git.Richard.Earnshaw@arm.com> In-Reply-To: <cover.1497004220.git.Richard.Earnshaw@arm.com> References: <cover.1497004220.git.Richard.Earnshaw@arm.com> In-Reply-To: <cover.1497004220.git.Richard.Earnshaw@arm.com> References: <cover.1497004220.git.Richard.Earnshaw@arm.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="------------2.7.4" |
Series |
Reworking the -mcpu, -march and -mfpu options
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expand
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diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S index 653ad14..9b7dbb4 100644 --- a/libgcc/config/arm/cmse_nonsecure_call.S +++ b/libgcc/config/arm/cmse_nonsecure_call.S @@ -24,6 +24,14 @@ <http://www.gnu.org/licenses/>. */ .syntax unified +#ifdef __ARM_PCS_VFP +# if __ARM_FP & 0x8 + .fpu fpv5-d16 +# else + .fpu fpv4-sp-d16 +# endif +#endif + .thumb .global __gnu_cmse_nonsecure_call __gnu_cmse_nonsecure_call: