[PATCHv3,0/4] x86: Make 5-level paging support unconditional for x86-64

Both Intel and AMD CPUs support 5-level paging, which is expected to
become more widely adopted in the future.

Remove CONFIG_X86_5LEVEL.

In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
SPARSEMEM_VMEMMAP the only memory model.

v3:
 - Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
 - Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
   to support PGTABLE_LEVELS < 5;
 - Add Reviewed-by tags from Ard;
v2:
 - Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
   #if CONFIG_PGTABLE_LEVELS > 4;
 - Rebased onto current tip/master;

Kirill A. Shutemov (4):
  x86/64/mm: Always use dynamic memory layout
  x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
  x86/64/mm: Make 5-level paging support unconditional
  x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only

 Documentation/arch/x86/cpuinfo.rst            |  8 ++---
 .../arch/x86/x86_64/5level-paging.rst         |  9 -----
 arch/x86/Kconfig                              | 33 ++-----------------
 arch/x86/Kconfig.cpufeatures                  |  4 ---
 arch/x86/boot/compressed/pgtable_64.c         | 11 ++-----
 arch/x86/boot/header.S                        |  4 ---
 arch/x86/boot/startup/map_kernel.c            |  5 +--
 arch/x86/entry/vsyscall/vsyscall_64.c         |  2 --
 arch/x86/include/asm/page_64.h                |  2 --
 arch/x86/include/asm/page_64_types.h          | 11 -------
 arch/x86/include/asm/paravirt.h               |  4 ---
 arch/x86/include/asm/paravirt_types.h         |  2 --
 arch/x86/include/asm/pgtable_64.h             |  2 --
 arch/x86/include/asm/pgtable_64_types.h       | 24 --------------
 arch/x86/kernel/alternative.c                 |  2 +-
 arch/x86/kernel/head64.c                      |  4 ---
 arch/x86/kernel/head_64.S                     |  2 --
 arch/x86/kernel/paravirt.c                    |  2 --
 arch/x86/mm/init.c                            |  4 ---
 arch/x86/mm/init_64.c                         |  9 +----
 arch/x86/mm/pgtable.c                         |  2 +-
 arch/x86/xen/mmu_pv.c                         |  4 ---
 drivers/firmware/efi/libstub/x86-5lvl.c       |  2 +-
 scripts/gdb/linux/pgtable.py                  |  4 +--
 24 files changed, 14 insertions(+), 142 deletions(-)

* Kirill A. Shutemov <kirill.shutemov@linux.intel.com> wrote:

> Both Intel and AMD CPUs support 5-level paging, which is expected to
> become more widely adopted in the future.
> 
> Remove CONFIG_X86_5LEVEL.
> 
> In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
> SPARSEMEM_VMEMMAP the only memory model.
> 
> v3:
>  - Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
>  - Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
>    to support PGTABLE_LEVELS < 5;
>  - Add Reviewed-by tags from Ard;
> v2:
>  - Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
>    #if CONFIG_PGTABLE_LEVELS > 4;
>  - Rebased onto current tip/master;

Wow, -v1 was sent almost a year ago. :-)

> Kirill A. Shutemov (4):
>   x86/64/mm: Always use dynamic memory layout
>   x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
>   x86/64/mm: Make 5-level paging support unconditional
>   x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only

>  24 files changed, 14 insertions(+), 142 deletions(-)

Okay, this series makes a lot of sense, because in practice all major 
distros have 5-level paging enabled:

  .config.opensuse.default:     CONFIG_X86_5LEVEL=y
  .config.ubuntu.localinstall:  CONFIG_X86_5LEVEL=y
  .config.fedora.generic:       CONFIG_X86_5LEVEL=y
  .config.rhel.generic:         CONFIG_X86_5LEVEL=y

So the !CONFIG_X86_5LEVEL case gets very little runtime testing by 
distributions and users.

So I've applied the first two patches to tip:x86/core:

  x86/mm/64: Always use dynamic memory layout
  x86/mm/64: Make SPARSEMEM_VMEMMAP the only memory model

as they are fairly straightforward.

Patch #3:

  x86/64/mm: Make 5-level paging support unconditional

... might have to wait until after v6.16-rc1, as it's a higher risk 
patch.

  x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only

... and this one depends on patch #3.

Does this approach sound good to everyone?

Thanks,

	Ingo

On Fri, May 16, 2025 at 03:11:14PM +0200, Ingo Molnar wrote:
> Does this approach sound good to everyone?

Sounds good to me.

On Fri, May 16, 2025 at 03:33:02PM +0300, Kirill A. Shutemov wrote:
> Both Intel and AMD CPUs support 5-level paging, which is expected to
> become more widely adopted in the future.
> 
> Remove CONFIG_X86_5LEVEL.
> 
> In preparation to that remove CONFIG_DYNAMIC_MEMORY_LAYOUT and make
> SPARSEMEM_VMEMMAP the only memory model.
> 
> v3:
>  - Drop few "#if CONFIG_PGTABLE_LEVELS >= 5";
>  - Make PARAVIRT_XXL 64-bit explicitly and drop ifdefs
>    to support PGTABLE_LEVELS < 5;
>  - Add Reviewed-by tags from Ard;
> v2:
>  - Fix 32-bit build by wrapping p4d_set_huge() and p4d_clear_huge() in
>    #if CONFIG_PGTABLE_LEVELS > 4;
>  - Rebased onto current tip/master;
> 
> Kirill A. Shutemov (4):
>   x86/64/mm: Always use dynamic memory layout
>   x86/64/mm: Make SPARSEMEM_VMEMMAP the only memory model
>   x86/64/mm: Make 5-level paging support unconditional
>   x86/paravirt: Restrict PARAVIRT_XXL to 64-bit only

The whole set passed randbuilds testing here too, and am running boot tests on
my pile of stinky hw.

If it passes, we could queue it all.

Thx.