| Message ID | 20250513-i2c-bus-freq-v1-1-9a333ad5757f@oss.qualcomm.com |
|---|---|
| State | New |
| Headers | show |
| Series | i2c: qcom-geni: fix I2C frequency table to achieve accurate bus rates | expand |
Hi, On Tue, May 13, 2025 at 04:38:33PM +0530, Kathiravan Thirumoorthy wrote: > Update the I2C frequency table to match the recommended values > specified in the I2C hardware programming guide. In the current IPQ5424 > configuration where 32MHz is the source clock, the I2C bus frequencies do > not meet expectations—for instance, 363KHz is achieved instead of the > expected 400KHz. > > Cc: stable@kernel.org > Fixes: 506bb2ab0075 ("i2c: qcom-geni: Support systems with 32MHz serial engine clock") > Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> > --- > drivers/i2c/busses/i2c-qcom-geni.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c > index ccea575fb7838db864ca4a2b21ebb3835b2567b2..2fec7b44bfc1baec68e321a9f57de4156120919b 100644 > --- a/drivers/i2c/busses/i2c-qcom-geni.c > +++ b/drivers/i2c/busses/i2c-qcom-geni.c > @@ -155,9 +155,9 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map_19p2mhz[] = { > > /* source_clock = 32 MHz */ > static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { > - { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 40 }, > - { I2C_MAX_FAST_MODE_FREQ, 4, 3, 11, 20 }, > - { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 6, 15 }, > + { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 38 }, > + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, > + { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 5, 15 }, argh! Can someone from Qualcomm look at this fix? Mukesh, Viken? Thanks, Andi > {} > }; > > > --- > base-commit: edef457004774e598fc4c1b7d1d4f0bcd9d0bb30 > change-id: 20250513-i2c-bus-freq-ac46343869a4 > > Best regards, > -- > Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> >
Thanks Andi ! On 5/14/2025 9:04 PM, Andi Shyti wrote: [...] >> /* source_clock = 32 MHz */ >> static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { >> - { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 40 }, >> - { I2C_MAX_FAST_MODE_FREQ, 4, 3, 11, 20 }, >> - { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 6, 15 }, >> + { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 38 }, >> + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, >> + { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 5, 15 }, > > argh! > > Can someone from Qualcomm look at this fix? Mukesh, Viken? Yes, I am reviewing internally and verifying the same with latest Guidance and updates. Let me update on this once reviewed. > > Thanks, > Andi > >> {} >> }; >> >> >> --- >> base-commit: edef457004774e598fc4c1b7d1d4f0bcd9d0bb30 >> change-id: 20250513-i2c-bus-freq-ac46343869a4 >> >> Best regards, >> -- >> Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> >>
Hi Mukesh, On Fri, May 16, 2025 at 12:23:46AM +0530, Mukesh Kumar Savaliya wrote: > > > /* source_clock = 32 MHz */ > > > static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { > > > - { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 40 }, > > > - { I2C_MAX_FAST_MODE_FREQ, 4, 3, 11, 20 }, > > > - { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 6, 15 }, > > > + { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 38 }, > > > + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, > > > + { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 5, 15 }, > > > > argh! > > > > Can someone from Qualcomm look at this fix? Mukesh, Viken? > Yes, I am reviewing internally and verifying the same with latest Guidance > and updates. Let me update on this once reviewed. thanks a lot! It's very much appreciated! Andi
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c index ccea575fb7838db864ca4a2b21ebb3835b2567b2..2fec7b44bfc1baec68e321a9f57de4156120919b 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -155,9 +155,9 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map_19p2mhz[] = { /* source_clock = 32 MHz */ static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { - { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 40 }, - { I2C_MAX_FAST_MODE_FREQ, 4, 3, 11, 20 }, - { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 6, 15 }, + { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 38 }, + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, + { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 5, 15 }, {} };
Update the I2C frequency table to match the recommended values specified in the I2C hardware programming guide. In the current IPQ5424 configuration where 32MHz is the source clock, the I2C bus frequencies do not meet expectations—for instance, 363KHz is achieved instead of the expected 400KHz. Cc: stable@kernel.org Fixes: 506bb2ab0075 ("i2c: qcom-geni: Support systems with 32MHz serial engine clock") Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> --- drivers/i2c/busses/i2c-qcom-geni.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) --- base-commit: edef457004774e598fc4c1b7d1d4f0bcd9d0bb30 change-id: 20250513-i2c-bus-freq-ac46343869a4 Best regards,