diff mbox series

[1/9] dt-bindings: timer: Add Sophgo SG2044 ACLINT timer

Message ID 20250407010616.749833-2-inochiama@gmail.com
State Superseded
Headers show
Series riscv: sophgo: Introduce SG2044 SRD3-10 board support | expand

Commit Message

Inochi Amaoto April 7, 2025, 1:06 a.m. UTC
Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
compatible string for SG2044 SoC.

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
 .../devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml      | 1 +
 1 file changed, 1 insertion(+)

Comments

Rob Herring April 7, 2025, 1:38 p.m. UTC | #1
On Mon, 07 Apr 2025 09:06:06 +0800, Inochi Amaoto wrote:
> Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
> compatible string for SG2044 SoC.
> 
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---
>  .../devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml      | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring (Arm) <robh@kernel.org>
Daniel Lezcano May 14, 2025, 2:18 p.m. UTC | #2
On Mon, Apr 07, 2025 at 09:06:06AM +0800, Inochi Amaoto wrote:
> Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
> compatible string for SG2044 SoC.
> 
> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
> ---

Applied, thanks
Chen Wang May 15, 2025, 12:03 a.m. UTC | #3
Hi, Daniel,

Just a kindly reminder. There is a v2 of this patcheset [1], and I see 
[1/9] of v2 has been picked by Andi [2].

Please double check if anything wrong or conflicted.

Thanks,

Chen

Link: 
https://lore.kernel.org/linux-riscv/20250413223507.46480-1-inochiama@gmail.com/ 
[1]

Link: 
https://lore.kernel.org/linux-riscv/egkwz23tyr3psl3eaqhzdhmvxlufem5vqdlwvl4y6henyeazuz@ch3oflv4ekw7/ 
[2]


On 2025/5/14 22:18, Daniel Lezcano wrote:
> On Mon, Apr 07, 2025 at 09:06:06AM +0800, Inochi Amaoto wrote:
>> Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
>> compatible string for SG2044 SoC.
>>
>> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
>> ---
> Applied, thanks
>
Daniel Lezcano May 15, 2025, 9:11 a.m. UTC | #4
On 5/15/25 02:03, Chen Wang wrote:
> Hi, Daniel,
> 
> Just a kindly reminder. There is a v2 of this patcheset [1], and I see 
> [1/9] of v2 has been picked by Andi [2].
> 
> Please double check if anything wrong or conflicted.

Thanks for the heads up

I think it is ok, I have the right version in my tree.

If you want to double check, it is here:

https://git.linaro.org/plugins/gitiles/people/daniel.lezcano/linux/+/refs/heads/timers/drivers/next


> Link: https://lore.kernel.org/linux-riscv/20250413223507.46480-1- 
> inochiama@gmail.com/ [1]
> 
> Link: https://lore.kernel.org/linux-riscv/ 
> egkwz23tyr3psl3eaqhzdhmvxlufem5vqdlwvl4y6henyeazuz@ch3oflv4ekw7/ [2]
> 
> 
> On 2025/5/14 22:18, Daniel Lezcano wrote:
>> On Mon, Apr 07, 2025 at 09:06:06AM +0800, Inochi Amaoto wrote:
>>> Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
>>> compatible string for SG2044 SoC.
>>>
>>> Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
>>> ---
>> Applied, thanks
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
index 2e92bcdeb423..4ed30efe4052 100644
--- a/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
+++ b/Documentation/devicetree/bindings/timer/thead,c900-aclint-mtimer.yaml
@@ -14,6 +14,7 @@  properties:
     items:
       - enum:
           - sophgo,sg2042-aclint-mtimer
+          - sophgo,sg2044-aclint-mtimer
       - const: thead,c900-aclint-mtimer
 
   reg: