| Message ID | 20250508081514.3227956-1-quic_wenbyao@quicinc.com |
|---|---|
| Headers | show |
| Series | arm64: qcom: x1e80100-qcp: Add power supply and sideband signals for PCIe RC | expand |
On 5/8/2025 4:15 PM, Wenbin Yao wrote: > The first patch enables the PCI Power Control driver to control the power > state of PCI slots. The second patch adds the bus topology of PCIe domain 3 > on x1e80100 platform. The third patch adds perst, wake and clkreq sideband > signals, and describe the regulators powering the rails of the PCI slots in > the devicetree for PCIe3 controller and PHY device. The fourth patch adds > qref supply in dts nodes of PCIe PHYs. The fifth patch requests qref supply > for PCIe PHYs. > > The patchset has been modified based on comments and suggestions. > > Changes in v3: > - Replace PCI_PWRCTL_SLOT with PCI_PWRCTRL_SLOT in Patch 1/5. > - Kepp the order of pinctrl-0 before pinctrl-names in Patch 3/5. > - Add Patch 5/5 to request qref supply for PCIe PHYs. > - Link to v2: https://lore.kernel.org/all/20250425092955.4099677-1-quic_wenbyao@quicinc.com/ > > Changes in v2: > - Select PCI_PWRCTL_SLOT by ARCH_QCOM in arch/arm64/Kconfig.platforms in > Patch 1/4. > - Add an empty line before pcie3port node in Patch 2/4. > - Rename regulator-pcie_12v regulator-pcie_3v3_aux and regulator-pcie_3v3 > in Patch 3/4. > - Add Patch 4/4 to describe qref supply of PCIe PHYs. > - Link to v1: https://lore.kernel.org/all/20250320055502.274849-1-quic_wenbyao@quicinc.com/ > > Qiang Yu (5): > arm64: Kconfig: enable PCI Power Control Slot driver for QCOM > arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3 > arm64: dts: qcom: x1e80100-qcp: enable pcie3 x8 slot for X1E80100-QCP > arm64: dts: qcom: x1e80100-qcp: Add qref supply for PCIe PHYs > phy: qcom: qmp-pcie: add x1e80100 qref supplies > > arch/arm64/Kconfig.platforms | 1 + > arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 121 ++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 11 ++ > drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 37 ++++++- > 4 files changed, 165 insertions(+), 5 deletions(-) > > > base-commit: 0a00723f4c2d0b273edd0737f236f103164a08eb Hi Can you please review patch[1/5], patch[2/5] and patch[3/5] first, QREF patch need more discussion, but it will not affect the PCIe function.