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[v4,127/163] target/openrisc: Use tcg_gen_addcio_* for ADDC

Message ID 20250415192515.232910-128-richard.henderson@linaro.org
State New
Headers show
Series tcg: Convert to TCGOutOp structures | expand

Commit Message

Richard Henderson April 15, 2025, 7:24 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/openrisc/translate.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Pierrick Bouvier April 16, 2025, 7:05 p.m. UTC | #1 
On 4/15/25 12:24, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/openrisc/translate.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
> index 7a6af183ae..c9856fdc88 100644
> --- a/target/openrisc/translate.c
> +++ b/target/openrisc/translate.c
> @@ -220,8 +220,7 @@ static void gen_addc(DisasContext *dc, TCGv dest, TCGv srca, TCGv srcb)
>       TCGv t0 = tcg_temp_new();
>       TCGv res = tcg_temp_new();
>   
> -    tcg_gen_add2_tl(res, cpu_sr_cy, srca, dc->zero, cpu_sr_cy, dc->zero);
> -    tcg_gen_add2_tl(res, cpu_sr_cy, res, cpu_sr_cy, srcb, dc->zero);
> +    tcg_gen_addcio_tl(res, cpu_sr_cy, srca, srcb, cpu_sr_cy);
>       tcg_gen_xor_tl(cpu_sr_ov, srca, srcb);
>       tcg_gen_xor_tl(t0, res, srcb);
>       tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov);

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff mbox series

Patch

diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 7a6af183ae..c9856fdc88 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -220,8 +220,7 @@  static void gen_addc(DisasContext *dc, TCGv dest, TCGv srca, TCGv srcb)
     TCGv t0 = tcg_temp_new();
     TCGv res = tcg_temp_new();
 
-    tcg_gen_add2_tl(res, cpu_sr_cy, srca, dc->zero, cpu_sr_cy, dc->zero);
-    tcg_gen_add2_tl(res, cpu_sr_cy, res, cpu_sr_cy, srcb, dc->zero);
+    tcg_gen_addcio_tl(res, cpu_sr_cy, srca, srcb, cpu_sr_cy);
     tcg_gen_xor_tl(cpu_sr_ov, srca, srcb);
     tcg_gen_xor_tl(t0, res, srcb);
     tcg_gen_andc_tl(cpu_sr_ov, t0, cpu_sr_ov);