| Message ID | 20250225184628.3590671-3-alex.bennee@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | cputlb: add tlb_flush_other_cpu | expand |
On 2/25/25 10:46, Alex Bennée wrote: > @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) > > cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, > hppa_cpu_alarm_timer, cpu); > - hppa_ptlbe(&cpu->env); > + async_run_on_cpu(cs, hppa_clear_ptlbe, RUN_ON_CPU_HOST_PTR(&cpu->env)); Nack, this is emulation of hardware, not softmmu. r~
On 2/25/25 11:33, Richard Henderson wrote: > On 2/25/25 10:46, Alex Bennée wrote: >> @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) >> cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, >> hppa_cpu_alarm_timer, cpu); >> - hppa_ptlbe(&cpu->env); >> + async_run_on_cpu(cs, hppa_clear_ptlbe, RUN_ON_CPU_HOST_PTR(&cpu->env)); > > Nack, this is emulation of hardware, not softmmu. Hmm. I see what you're thinking about though: this function, after resetting the data structures associated with the hardware emulation, also calls the softmmu flush. If we absolutely need to do so, I suppose delaying the hardware emulation flush to the work queue isn't the worst solution. This is where the hppa patch is more correct than the ppc patch which completely eliminated the hardware emulation flush. r~
On Wed Feb 26, 2025 at 5:38 AM AEST, Richard Henderson wrote: > On 2/25/25 11:33, Richard Henderson wrote: >> On 2/25/25 10:46, Alex Bennée wrote: >>> @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) >>> cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, >>> hppa_cpu_alarm_timer, cpu); >>> - hppa_ptlbe(&cpu->env); >>> + async_run_on_cpu(cs, hppa_clear_ptlbe, RUN_ON_CPU_HOST_PTR(&cpu->env)); >> >> Nack, this is emulation of hardware, not softmmu. > > Hmm. I see what you're thinking about though: this function, after resetting the data > structures associated with the hardware emulation, also calls the softmmu flush. > > If we absolutely need to do so, I suppose delaying the hardware emulation flush to the > work queue isn't the worst solution. This is where the hppa patch is more correct than > the ppc patch which completely eliminated the hardware emulation flush. Could we expose a function that performs the hardware state reset, and leave the TCG flushing to the TCG CPU reset? Thanks, Nick
"Nicholas Piggin" <npiggin@gmail.com> writes: > On Wed Feb 26, 2025 at 5:38 AM AEST, Richard Henderson wrote: >> On 2/25/25 11:33, Richard Henderson wrote: >>> On 2/25/25 10:46, Alex Bennée wrote: >>>> @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) >>>> cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, >>>> hppa_cpu_alarm_timer, cpu); >>>> - hppa_ptlbe(&cpu->env); >>>> + async_run_on_cpu(cs, hppa_clear_ptlbe, RUN_ON_CPU_HOST_PTR(&cpu->env)); >>> >>> Nack, this is emulation of hardware, not softmmu. >> >> Hmm. I see what you're thinking about though: this function, after resetting the data >> structures associated with the hardware emulation, also calls the softmmu flush. >> >> If we absolutely need to do so, I suppose delaying the hardware emulation flush to the >> work queue isn't the worst solution. This is where the hppa patch is more correct than >> the ppc patch which completely eliminated the hardware emulation flush. > > Could we expose a function that performs the hardware state reset, > and leave the TCG flushing to the TCG CPU reset? I did consider that - but the function is also called from helpers at which point you also do need to flush the softmmu TLB. However someone with better knowledge of the architecture might be able to do a slightly more refined flush (individual pages or mmuidxs) in those cases. > > Thanks, > Nick
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 5655677431..b631af381c 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -168,6 +168,14 @@ void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr, cpu_loop_exit(cs); } + +static void hppa_clear_ptlbe(CPUState *cpu, run_on_cpu_data opaque) +{ + CPUHPPAState *env = (CPUHPPAState *) opaque.host_ptr; + hppa_ptlbe(env); +} + + #endif /* CONFIG_USER_ONLY */ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, hppa_cpu_alarm_timer, cpu); - hppa_ptlbe(&cpu->env); + async_run_on_cpu(cs, hppa_clear_ptlbe, RUN_ON_CPU_HOST_PTR(&cpu->env)); } #endif
Since 30933c4fb4 (tcg/cputlb: remove other-cpu capability from TLB flushing) we don't expect non-CPU callers to the tlb_flush() code. Normally I would drop the call anyway as the common cpu_reset() code will call tlb_flush anyway. However as the flush function does more than that, and is called from helpers instead defer it with an async_run_on_cpu. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> --- target/hppa/cpu.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)