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[0/4] Bluetooth: qca: add Qualcomm WCN3950 BT/WiFi chip support

Message ID 20250201-rb1-bt-v1-0-ae896c4923d8@linaro.org
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Series Bluetooth: qca: add Qualcomm WCN3950 BT/WiFi chip support | expand

Message

Dmitry Baryshkov Feb. 1, 2025, 9:18 a.m. UTC
Qualcomm Robotics RB1 platform uses a new member of the WCN39xx family
of BT/WiFi chips. Add support for this member of the family and enable
it to be used on the RB1 board.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Dmitry Baryshkov (4):
      dt-bindings: net: bluetooth: qualcomm: document WCN3950
      Bluetooth: qca: add WCN3950 support
      arm64: dts: qcom: qcm2290: add UART3 device
      arm64: dts: qcom: qrb2210-rb1: add Bluetooth support

 .../bindings/net/bluetooth/qualcomm-bluetooth.yaml |  2 +
 arch/arm64/boot/dts/qcom/qcm2290.dtsi              | 15 ++++
 arch/arm64/boot/dts/qcom/qrb2210-rb1.dts           | 81 ++++++++++++++++++++++
 drivers/bluetooth/btqca.c                          |  9 +++
 drivers/bluetooth/btqca.h                          |  1 +
 drivers/bluetooth/hci_qca.c                        | 25 +++++++
 6 files changed, 133 insertions(+)
---
base-commit: 88b6bfc04cc5f60ce79c25cd27fe83f7fb4468bf
change-id: 20250201-rb1-bt-cec7a314991d

Best regards,

Comments

Dmitry Baryshkov Feb. 1, 2025, 4:22 p.m. UTC | #1
On Sat, Feb 01, 2025 at 04:19:01PM +0100, Konrad Dybcio wrote:
> On 1.02.2025 10:18 AM, Dmitry Baryshkov wrote:
> > On QCM2290-based devices the SE3 is used for the Bluetooth chips. Add
> > corresponding device node.
> > 
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > ---
> >  arch/arm64/boot/dts/qcom/qcm2290.dtsi | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> > index f0746123e594d5ce5cc314c956eaca11556a9211..5f92eb16482a0ea5f8436cfa7e55849f171ebd24 100644
> > --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> > @@ -1239,6 +1239,21 @@ &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
> >  				status = "disabled";
> >  			};
> >  
> > +			uart3: serial@4a8c000 {
> > +				compatible = "qcom,geni-uart";
> > +				reg = <0x0 0x04a8c000 0x0 0x4000>;
> > +				interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
> > +				clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
> > +				clock-names = "se";
> > +				interconnects = <&qup_virt MASTER_QUP_CORE_0 RPM_ALWAYS_TAG
> > +						 &qup_virt SLAVE_QUP_CORE_0 RPM_ALWAYS_TAG>,
> > +						<&bimc MASTER_APPSS_PROC RPM_ALWAYS_TAG
> > +						 &config_noc MASTER_APPSS_PROC RPM_ALWAYS_TAG>;
> 
> This path doesn't look quite right.. there'MASTER_APPSS_PROC is only
> on one of these.

Hmm. I should check my c&p source then.

> 
> + RPM_ACTIVE_TAG
> 
> Konrad