diff mbox series

[1/2] PCI: dwc: dra7xx: Use syscon_regmap_lookup_by_phandle_args

Message ID 20250112-syscon-phandle-args-pci-v1-1-fcb6ebcc0afc@linaro.org
State New
Headers show
Series PCI: Simplify few things | expand

Commit Message

Krzysztof Kozlowski Jan. 12, 2025, 1:39 p.m. UTC
Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over
syscon_regmap_lookup_by_phandle() combined with getting the syscon
argument.  Except simpler code this annotates within one line that given
phandle has arguments, so grepping for code would be easier.

There is also no real benefit in printing errors on missing syscon
argument, because this is done just too late: runtime check on
static/build-time data.  Dtschema and Devicetree bindings offer the
static/build-time check for this already.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 drivers/pci/controller/dwc/pci-dra7xx.c | 27 ++++++---------------------
 1 file changed, 6 insertions(+), 21 deletions(-)

Comments

Bjorn Helgaas Jan. 15, 2025, 11:04 p.m. UTC | #1
On Sun, Jan 12, 2025 at 02:39:02PM +0100, Krzysztof Kozlowski wrote:
> Use syscon_regmap_lookup_by_phandle_args() which is a wrapper over
> syscon_regmap_lookup_by_phandle() combined with getting the syscon
> argument.  Except simpler code this annotates within one line that given
> phandle has arguments, so grepping for code would be easier.
> 
> There is also no real benefit in printing errors on missing syscon
> argument, because this is done just too late: runtime check on
> static/build-time data.  Dtschema and Devicetree bindings offer the
> static/build-time check for this already.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
>  drivers/pci/controller/dwc/pci-dra7xx.c | 27 ++++++---------------------
>  1 file changed, 6 insertions(+), 21 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
> index 5c62e1a3ba52919afe96fbcbc6edaf70775a69cb..33d6bf460ffe5bb724a061558dd93ec7bdadc336 100644
> --- a/drivers/pci/controller/dwc/pci-dra7xx.c
> +++ b/drivers/pci/controller/dwc/pci-dra7xx.c
> @@ -635,30 +635,20 @@ static int dra7xx_pcie_unaligned_memaccess(struct device *dev)
>  {
>  	int ret;
>  	struct device_node *np = dev->of_node;
> -	struct of_phandle_args args;
> +	unsigned int args[2];
>  	struct regmap *regmap;
>  
> -	regmap = syscon_regmap_lookup_by_phandle(np,
> -						 "ti,syscon-unaligned-access");
> +	regmap = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-unaligned-access",
> +						      2, args);
>  	if (IS_ERR(regmap)) {
>  		dev_dbg(dev, "can't get ti,syscon-unaligned-access\n");
>  		return -EINVAL;
>  	}
>  
> -	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-unaligned-access",
> -					       2, 0, &args);
> -	if (ret) {
> -		dev_err(dev, "failed to parse ti,syscon-unaligned-access\n");
> -		return ret;
> -	}
> -
> -	ret = regmap_update_bits(regmap, args.args[0], args.args[1],
> -				 args.args[1]);
> +	ret = regmap_update_bits(regmap, args[0], args[1], args[1]);
>  	if (ret)
>  		dev_err(dev, "failed to enable unaligned access\n");
>  
> -	of_node_put(args.np);
> -
>  	return ret;
>  }
>  
> @@ -671,18 +661,13 @@ static int dra7xx_pcie_configure_two_lane(struct device *dev,
>  	u32 mask;
>  	u32 val;
>  
> -	pcie_syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-lane-sel");
> +	pcie_syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-lane-sel",
> +							   1, &pcie_reg);
>  	if (IS_ERR(pcie_syscon)) {
>  		dev_err(dev, "unable to get ti,syscon-lane-sel\n");
>  		return -EINVAL;
>  	}
>  
> -	if (of_property_read_u32_index(np, "ti,syscon-lane-sel", 1,
> -				       &pcie_reg)) {
> -		dev_err(dev, "couldn't get lane selection reg offset\n");
> -		return -EINVAL;
> -	}

Wow.  I believe you that syscon_regmap_lookup_by_phandle_args() is
equivalent to both:

  - syscon_regmap_lookup_by_phandle() followed by
    of_parse_phandle_with_fixed_args(), and

  - syscon_regmap_lookup_by_phandle() followed by
    of_property_read_u32_index()

but I can't say it's obvious to this syscon- and OF-naive reviewer,
even after tracing a few layers in :)

Bjorn
diff mbox series

Patch

diff --git a/drivers/pci/controller/dwc/pci-dra7xx.c b/drivers/pci/controller/dwc/pci-dra7xx.c
index 5c62e1a3ba52919afe96fbcbc6edaf70775a69cb..33d6bf460ffe5bb724a061558dd93ec7bdadc336 100644
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -635,30 +635,20 @@  static int dra7xx_pcie_unaligned_memaccess(struct device *dev)
 {
 	int ret;
 	struct device_node *np = dev->of_node;
-	struct of_phandle_args args;
+	unsigned int args[2];
 	struct regmap *regmap;
 
-	regmap = syscon_regmap_lookup_by_phandle(np,
-						 "ti,syscon-unaligned-access");
+	regmap = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-unaligned-access",
+						      2, args);
 	if (IS_ERR(regmap)) {
 		dev_dbg(dev, "can't get ti,syscon-unaligned-access\n");
 		return -EINVAL;
 	}
 
-	ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-unaligned-access",
-					       2, 0, &args);
-	if (ret) {
-		dev_err(dev, "failed to parse ti,syscon-unaligned-access\n");
-		return ret;
-	}
-
-	ret = regmap_update_bits(regmap, args.args[0], args.args[1],
-				 args.args[1]);
+	ret = regmap_update_bits(regmap, args[0], args[1], args[1]);
 	if (ret)
 		dev_err(dev, "failed to enable unaligned access\n");
 
-	of_node_put(args.np);
-
 	return ret;
 }
 
@@ -671,18 +661,13 @@  static int dra7xx_pcie_configure_two_lane(struct device *dev,
 	u32 mask;
 	u32 val;
 
-	pcie_syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-lane-sel");
+	pcie_syscon = syscon_regmap_lookup_by_phandle_args(np, "ti,syscon-lane-sel",
+							   1, &pcie_reg);
 	if (IS_ERR(pcie_syscon)) {
 		dev_err(dev, "unable to get ti,syscon-lane-sel\n");
 		return -EINVAL;
 	}
 
-	if (of_property_read_u32_index(np, "ti,syscon-lane-sel", 1,
-				       &pcie_reg)) {
-		dev_err(dev, "couldn't get lane selection reg offset\n");
-		return -EINVAL;
-	}
-
 	mask = b1co_mode_sel_mask | PCIE_B0_B1_TSYNCEN;
 	val = PCIE_B1C0_MODE_SEL | PCIE_B0_B1_TSYNCEN;
 	regmap_update_bits(pcie_syscon, pcie_reg, mask, val);