| Message ID | 20241025161501.485684-25-miquel.raynal@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | spi-nand/spi-mem DTR support | expand |
On 10/25/24 5:15 PM, Miquel Raynal wrote: > W25N01JW and W25N02JW support many DTR read modes in single, dual and > quad configurations. > > DTR modes however cannot be used at 166MHz, as the bus frequency in > this case must be lowered to 80MHz. ha, what's the benefit then? Aren't we better of with non dtr modes then? 80 MHz * 2 < 166 MHz? > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> > --- > drivers/mtd/nand/spi/winbond.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c > index 9e2562805d23..77897a52b149 100644 > --- a/drivers/mtd/nand/spi/winbond.c > +++ b/drivers/mtd/nand/spi/winbond.c > @@ -24,10 +24,15 @@ > */ > > static SPINAND_OP_VARIANTS(read_cache_dtr_variants, > + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_DTR_OP(0, 8, NULL, 0, 80 * HZ_PER_MHZ), > + SPINAND_PAGE_READ_FROM_CACHE_X4_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), > SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), > SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), > + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_DTR_OP(0, 4, NULL, 0, 80 * HZ_PER_MHZ), > + SPINAND_PAGE_READ_FROM_CACHE_X2_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), > SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), > SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), > + SPINAND_PAGE_READ_FROM_CACHE_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), > SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(0, 1, NULL, 0), > SPINAND_PAGE_READ_FROM_CACHE_OP(0, 1, NULL, 0, 54 * HZ_PER_MHZ)); >
Hello Tudor, On 11/11/2024 at 14:40:59 GMT, Tudor Ambarus <tudor.ambarus@linaro.org> wrote: > On 10/25/24 5:15 PM, Miquel Raynal wrote: >> W25N01JW and W25N02JW support many DTR read modes in single, dual and >> quad configurations. >> >> DTR modes however cannot be used at 166MHz, as the bus frequency in >> this case must be lowered to 80MHz. > > ha, what's the benefit then? Aren't we better of with non dtr modes > then? 80 MHz * 2 < 166 MHz? This is actually a good question, and you are right DDR in this case does not bring better throughputs, it can even make it a little bit slower. I think however we should expect some gains at the PCB design step, which may be way simpler as routing 8 166MHz lines might apparently be challenging. It is common to have PCB limitations on the frequency, so enabling DDR can be a great way to keep signal integrity while definitely improving the performances. However, you're right, I should probably move these definitions lower in the table to make sure we run at 166MHz if that's possible. Thanks, Miquèl
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index 9e2562805d23..77897a52b149 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -24,10 +24,15 @@ */ static SPINAND_OP_VARIANTS(read_cache_dtr_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_DTR_OP(0, 8, NULL, 0, 80 * HZ_PER_MHZ), + SPINAND_PAGE_READ_FROM_CACHE_X4_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_DTR_OP(0, 4, NULL, 0, 80 * HZ_PER_MHZ), + SPINAND_PAGE_READ_FROM_CACHE_X2_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DTR_OP(0, 2, NULL, 0, 80 * HZ_PER_MHZ), SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(0, 1, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_OP(0, 1, NULL, 0, 54 * HZ_PER_MHZ));
W25N01JW and W25N02JW support many DTR read modes in single, dual and quad configurations. DTR modes however cannot be used at 166MHz, as the bus frequency in this case must be lowered to 80MHz. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/spi/winbond.c | 5 +++++ 1 file changed, 5 insertions(+)