| Message ID | 20241216195325.164212-1-biju.das.jz@bp.renesas.com |
|---|---|
| Headers | show |
| Series | Add RZ/G3E pinctrl support | expand |
On Mon, Dec 16, 2024 at 07:53:11PM +0000, Biju Das wrote: > RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical > ports in DT using RZV2H_* macros. So this is only for DT? Not really a binding. Binding binds driver implementation with DTS and you do not have here driver. Calling it a binding makes it immutable and gives us, DT maintainers, more work, so really no benefits at all. I guess other DT maintainers will ack it, I prefer to reduce number of headers. Best regards, Krzysztof
Hi Krzysztof Kozlowski, Thanks for the feedback. > -----Original Message----- > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: 17 December 2024 06:32 > Subject: Re: [PATCH v4 1/7] dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H > > On Mon, Dec 16, 2024 at 07:53:11PM +0000, Biju Das wrote: > > RZ/V2H has ports P0-P9 and PA-PB. Add support for defining > > alpha-numerical ports in DT using RZV2H_* macros. > > So this is only for DT? Not really a binding. Binding binds driver implementation with DTS and you do > not have here driver. Please see patch [1], see how this definition binds driver implementation with DTS [1] https://lore.kernel.org/all/20241216195325.164212-4-biju.das.jz@bp.renesas.com/ > > Calling it a binding makes it immutable and gives us, DT maintainers, more work, so really no benefits > at all. > > I guess other DT maintainers will ack it, I prefer to reduce number of headers. DT describes hardware. The port names are alpha numeric on hardware manual. For example, consider the case of hardware pin PS1 mentioned in hardware manual. With current changes, pinmux = <RZG3E_PORT_PINMUX(S, 1, 0)>; With existing code pinmux = <RZG3E_PORT_PINMUX(28, 1, 0)>; What do you prefer here? 28 is just a number derived from hardware indices Or actual port name PS1 as mentioned in hardware manual? Cheers, Biju
On 17/12/2024 09:49, Biju Das wrote: > Hi Krzysztof Kozlowski, > >> -----Original Message----- >> From: Krzysztof Kozlowski <krzk@kernel.org> >> Sent: 17 December 2024 07:51 >> Subject: Re: [PATCH v4 1/7] dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H >> >> On 17/12/2024 08:29, Biju Das wrote: >>> Hi Krzysztof Kozlowski, >>> >>> Thanks for the feedback. >>> >>>> -----Original Message----- >>>> From: Krzysztof Kozlowski <krzk@kernel.org> >>>> Sent: 17 December 2024 06:32 >>>> Subject: Re: [PATCH v4 1/7] dt-bindings: pinctrl: renesas: Add >>>> alpha-numerical port support for RZ/V2H >>>> >>>> On Mon, Dec 16, 2024 at 07:53:11PM +0000, Biju Das wrote: >>>>> RZ/V2H has ports P0-P9 and PA-PB. Add support for defining >>>>> alpha-numerical ports in DT using RZV2H_* macros. >>>> >>>> So this is only for DT? Not really a binding. Binding binds driver >>>> implementation with DTS and you do not have here driver. >>> >>> Please see patch [1], see how this definition binds driver >>> implementation with DTS >>> >>> [1] >>> https://lore.kernel.org/all/20241216195325.164212-4-biju.das.jz@bp.ren >>> esas.com/ >> >> I don't know what is this patch, it is not part of these series addressed to me and commit msg says >> "in DT". If you want to receive meaningful review, make it easier for reviewers. > > The header files are part of DT bindings. So if it is wrong, why the > Commit "997daa8de64ccbb" "dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings" > is part of bindings? I meant that driver patch you linked. > > > >> >> >>> >>>> >>>> Calling it a binding makes it immutable and gives us, DT maintainers, >>>> more work, so really no benefits at all. >>> >>>> >>>> I guess other DT maintainers will ack it, I prefer to reduce number of headers. >>> >>> DT describes hardware. The port names are alpha numeric on hardware manual. >> >> We talk about binding, not DT. > > Bu the definitions are part of bindings just like Commit "997daa8de64ccbb". You made them part of bindings, but this is invalid as argument. How is this anyhow related? How is "DT describes hardware" part of binding? You said "DT describes hardware", but we do not talk here about DT, do we? We talk about binding. > >> >>> >>> For example, consider the case of hardware pin PS1 mentioned in hardware manual. >>> >>> With current changes, >>> pinmux = <RZG3E_PORT_PINMUX(S, 1, 0)>; >>> >>> With existing code >>> pinmux = <RZG3E_PORT_PINMUX(28, 1, 0)>; >> >> Based on this pure code: still not a binding. > > I agree. Macro converted to a number which binding care of. > >> >>> >>> What do you prefer here? 28 is just a number derived from hardware >>> indices >> >> Let me ask rhetorical question: if 28 hardware constant is suitable for binding, then why are you not >> defining GPIO numbers, IRQ numbers and MMIO addresses as bindings as well? > > On RZ/G2L all ports are in numbers not an issue. But on RZ/V2H an RZ/G3E > hardware manual just talks about Port {0..8} {A..H}{J..M}{S}. Hardware constant 28 is just derived one. > > A device user just refer, hardware manual and pinctrl list and put the definitions on binding. > He does not need to undergo mapping for alpha numeric to hardware index conversion. You just described something entirely else than binding, so why are you using this as an argument? > > >> >>> Or actual port name PS1 as mentioned in hardware manual? >> >> Well, I don't know. Commit says DTS, no driver patches here in my inbox, so what do I know? > > OK, It is just definitions, so you mean it has to merge with driver + dts patch. so it won't > create any confusion and we can ignore check patch warning, "binding patch should be > Separate patch" > > What about then merging this patch with [2] and [3] similar to [4], > > [2] https://lore.kernel.org/all/20241216195325.164212-4-biju.das.jz@bp.renesas.com/ > [3] https://lore.kernel.org/all/20241216195325.164212-6-biju.das.jz@bp.renesas.com/ I am not going to keep reading all the external references you keep bringing or discussing why someone else did something. This patch must be logical and correct on its own, not because someone else made something somewhere. > > [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/include/dt-bindings?h=next-20241217&id=ecc79ab919ec54c658fb14f955c76872119829b8 Again, I did not see any driver using this, nothing in commit msg explained this except referencing that DT will use it. Maybe your patchset is wrongly organized? Maybe commit msg is incorrect? Not sure, as I said, you got such review you helped me to make. Best regards, Krzysztof
On 17/12/2024 10:19, Biju Das wrote: >>>>>> Calling it a binding makes it immutable and gives us, DT >>>>>> maintainers, more work, so really no benefits at all. >>>>> >>>>>> >>>>>> I guess other DT maintainers will ack it, I prefer to reduce number of headers. >>>>> >>>>> DT describes hardware. The port names are alpha numeric on hardware manual. >>>> >>>> We talk about binding, not DT. >>> >>> Bu the definitions are part of bindings just like Commit "997daa8de64ccbb". >> >> You made them part of bindings, but this is invalid as argument. How is this anyhow related? How is >> "DT describes hardware" part of binding? >> >> You said "DT describes hardware", but we do not talk here about DT, do we? We talk about binding. > > OK. > >> I am not going to keep reading all the external references you keep bringing or discussing why someone >> else did something. This patch must be logical and correct on its own, not because someone else made >> something somewhere. > > OK. According to me this patch is correct. It is for DT user and it described clearly in commit message So you repeat first point which I objected in the first place. If this is for DT, then this is not a binding and does not deserve header. > > "RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical > ports in DT using RZV2H_* macros." I read it, I objected to it. Best regards, Krzysztof
Hi Rob, > -----Original Message----- > From: Rob Herring <robh@kernel.org> > Sent: 17 December 2024 11:58 > Subject: Re: [PATCH v4 1/7] dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H > > On Mon, Dec 16, 2024 at 07:53:11PM +0000, Biju Das wrote: > > RZ/V2H has ports P0-P9 and PA-PB. Add support for defining > > alpha-numerical ports in DT using RZV2H_* macros. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v3->v4: > > * Added new header file with separate RZV2H_P* definitions. > > v3: > > * New patch. > > --- > > .../pinctrl/renesas,r9a09g057-pinctrl.h | 31 +++++++++++++++++++ > > 1 file changed, 31 insertions(+) > > create mode 100644 > > include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h > > > > diff --git a/include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h > > b/include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h > > new file mode 100644 > > index 000000000000..9008a7e71609 > > --- /dev/null > > +++ b/include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h > > @@ -0,0 +1,31 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > > +/* > > + * This header provides constants for Renesas RZ/V2H family pinctrl bindings. > > + * > > + * Copyright (C) 2024 Renesas Electronics Corp. > > + * > > + */ > > + > > +#ifndef __DT_BINDINGS_RZV2H_PINCTRL_H #define > > +__DT_BINDINGS_RZV2H_PINCTRL_H > > + > > +#include <dt-bindings/pinctrl/rzg2l-pinctrl.h> > > + > > +/* RZV2H_Px = Offset address of PFC_P_mn - 0x20 */ > > +#define RZV2H_P0 0 > > +#define RZV2H_P1 1 > > +#define RZV2H_P2 2 > > +#define RZV2H_P3 3 > > +#define RZV2H_P4 4 > > +#define RZV2H_P5 5 > > +#define RZV2H_P6 6 > > +#define RZV2H_P7 7 > > +#define RZV2H_P8 8 > > +#define RZV2H_P9 9 > > +#define RZV2H_PA 10 > > +#define RZV2H_PB 11 > > I'm not a fan of defines which are just 'FOO_n n'. And these are if you speak hex. For RZ/V2H, ports are P{0..9} and P{A..B}, the port name are with in hexa decimal range whereas for RZ/G3E SoC, Ports are P{0..8},P{A..H},P{J..M},PS RZ/V2H and RZ/G3E are similar SoCs. > > > + > > +#define RZV2H_PORT_PINMUX(b, p, f) RZG2L_PORT_PINMUX(RZV2H_P##b, p, f) > > +#define RZV2H_GPIO(port, pin) RZG2L_GPIO(RZV2H_P##port, pin) > > So the user does RZV2H_GPIO(A, 123) instead of RZV2H_GPIO(0xA, 123)? Not sure the bounds checking the > port is worth it. pin or function can still be crap. Previously we were using plain number in DT for RZ/V2H, RZG2L_GPIO(10, pin) = RZG2L_GPIO(0xA, pin) The port names for RZ/G2L are plane number, whereas for RZ/G3E and RZ/V2H it's alpha numeric. Since RZ/V2H ports are within the hexadecimal range, maybe this header file can be dropped at least for RZ/V2H?? Any way we are doing bounds check in driver. Cheers, Biju
On Mon, 16 Dec 2024 19:53:11 +0000, Biju Das wrote: > RZ/V2H has ports P0-P9 and PA-PB. Add support for defining alpha-numerical > ports in DT using RZV2H_* macros. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3->v4: > * Added new header file with separate RZV2H_P* definitions. > v3: > * New patch. > --- > .../pinctrl/renesas,r9a09g057-pinctrl.h | 31 +++++++++++++++++++ > 1 file changed, 31 insertions(+) > create mode 100644 include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h > Acked-by: Rob Herring (Arm) <robh@kernel.org>
Add pin controller support for the Renesas RZ/G3E(R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3). The port number on both RZ/V2H and RZ/G3E is alpha-numeric compared to the number on the other SoCs. So added support for defining alpha-numeric port names. v3->v4: * Added new header file with separate RZV2H_P* and RZG3E_P* definitions. * Dropped ack tag from Conor for patch#2 as there is separate file for RZG3E_P* definitions. * Included header file renesas,r9a09g057-pinctrl.h * Updated r9a09g057_variable_pin_cfg table replacing PORT_PB->RZV2H_PB macro. * Included header file renesas,r9a09g047-pinctrl.h * Replaced macros PORT_P*->RZG3E_P* * Updated rzg3e_gpio_names table with NULL port names for ports corresponding to unsupported hardware indices. * Updated r9a09g047_gpio_configs table with NULL value for ports corresponding to unsupported hardware indices. * Collected Rb tag from Geert for dts changes. v2->v3: * Added alpha-numerical port name support to both RZ/V2H and RZ/G3E. * Added PORT_P* macros based on PFC_P_mn offset and RZ{G3E,V2H}_* macros for defining port names in DT. * Collected tags. * Updated r9a09g057_variable_pin_cfg table replacing port 11 with PORT_PB. * Replaced macros WDTUDF_CA->WDTUDFCA and WDTUDF_CM->WDTUDFCM. * Replaced macro QSD0_*->SD0*. * Updated gpio range from 176->232 to match the port number based on hardware indices. v1->v2: * Updated typo of the patch header RZ/G2L->RZ/G3E * Fixed the binding warnings reported by bot. Biju Das (7): dt-bindings: pinctrl: renesas: Add alpha-numerical port support for RZ/V2H dt-bindings: pinctrl: renesas: Document RZ/G3E SoC pinctrl: renesas: rzg2l: Update r9a09g057_variable_pin_cfg table pinctrl: renesas: rzg2l: Add support for RZ/G3E SoC arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Replace RZG2L macros arm64: dts: renesas: r9a09g047: Add pincontrol node arm64: dts: renesas: r9a09g047: Add scif pincontrol .../pinctrl/renesas,rzg2l-pinctrl.yaml | 7 +- arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 13 ++ .../boot/dts/renesas/r9a09g047e57-smarc.dts | 13 ++ .../dts/renesas/r9a09g057h44-rzv2h-evk.dts | 36 ++-- drivers/pinctrl/renesas/Kconfig | 1 + drivers/pinctrl/renesas/pinctrl-rzg2l.c | 186 +++++++++++++++++- .../pinctrl/renesas,r9a09g047-pinctrl.h | 41 ++++ .../pinctrl/renesas,r9a09g057-pinctrl.h | 31 +++ 8 files changed, 302 insertions(+), 26 deletions(-) create mode 100644 include/dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h create mode 100644 include/dt-bindings/pinctrl/renesas,r9a09g057-pinctrl.h