diff mbox series

[10/18] accel/tcg: Move TranslationBlock declarations to 'tb-internal.h'

Message ID 20241212185341.2857-11-philmd@linaro.org
State Superseded
Headers show
Series accel/tcg: Extract user APIs out of 'exec/[cpu, exec]-all.h' | expand

Commit Message

Philippe Mathieu-Daudé Dec. 12, 2024, 6:53 p.m. UTC 
Move declarations related to TranslationBlock out of the
generic "internal-target.h" to "tb-internal.h".

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 accel/tcg/internal-target.h | 32 ------------------------------
 accel/tcg/tb-internal.h     | 39 +++++++++++++++++++++++++++++++++++++
 accel/tcg/cpu-exec.c        |  1 +
 accel/tcg/cputlb.c          |  1 +
 accel/tcg/tb-maint.c        |  1 +
 accel/tcg/translate-all.c   |  1 +
 accel/tcg/translator.c      |  1 +
 7 files changed, 44 insertions(+), 32 deletions(-)

Comments

Pierrick Bouvier Dec. 12, 2024, 7:25 p.m. UTC | #1 
On 12/12/24 10:53, Philippe Mathieu-Daudé wrote:
> Move declarations related to TranslationBlock out of the
> generic "internal-target.h" to "tb-internal.h".
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   accel/tcg/internal-target.h | 32 ------------------------------
>   accel/tcg/tb-internal.h     | 39 +++++++++++++++++++++++++++++++++++++
>   accel/tcg/cpu-exec.c        |  1 +
>   accel/tcg/cputlb.c          |  1 +
>   accel/tcg/tb-maint.c        |  1 +
>   accel/tcg/translate-all.c   |  1 +
>   accel/tcg/translator.c      |  1 +
>   7 files changed, 44 insertions(+), 32 deletions(-)
> 
> diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
> index 0437d798295..1cfa318dc6c 100644
> --- a/accel/tcg/internal-target.h
> +++ b/accel/tcg/internal-target.h
> @@ -36,42 +36,10 @@ static inline void page_table_config_init(void) { }
>   void page_table_config_init(void);
>   #endif
>   
> -#ifdef CONFIG_USER_ONLY
> -#include "user/page-protection.h"
> -/*
> - * For user-only, page_protect sets the page read-only.
> - * Since most execution is already on read-only pages, and we'd need to
> - * account for other TBs on the same page, defer undoing any page protection
> - * until we receive the write fault.
> - */
> -static inline void tb_lock_page0(tb_page_addr_t p0)
> -{
> -    page_protect(p0);
> -}
> -
> -static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1)
> -{
> -    page_protect(p1);
> -}
> -
> -static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { }
> -static inline void tb_unlock_pages(TranslationBlock *tb) { }
> -#else
> -void tb_lock_page0(tb_page_addr_t);
> -void tb_lock_page1(tb_page_addr_t, tb_page_addr_t);
> -void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
> -void tb_unlock_pages(TranslationBlock *);
> -#endif
> -
>   #ifdef CONFIG_SOFTMMU
> -void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
> -                                   unsigned size,
> -                                   uintptr_t retaddr);
>   G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
>   #endif /* CONFIG_SOFTMMU */
>   
> -bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
> -
>   /**
>    * tcg_req_mo:
>    * @type: TCGBar
> diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h
> index 8313f90fd71..90be61f296a 100644
> --- a/accel/tcg/tb-internal.h
> +++ b/accel/tcg/tb-internal.h
> @@ -9,6 +9,45 @@
>   #ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H
>   #define ACCEL_TCG_TB_INTERNAL_TARGET_H
>   
> +#include "exec/cpu-all.h"
> +#include "exec/exec-all.h"
> +#include "exec/translation-block.h"
> +
> +#ifdef CONFIG_USER_ONLY
> +#include "user/page-protection.h"
> +/*
> + * For user-only, page_protect sets the page read-only.
> + * Since most execution is already on read-only pages, and we'd need to
> + * account for other TBs on the same page, defer undoing any page protection
> + * until we receive the write fault.
> + */
> +static inline void tb_lock_page0(tb_page_addr_t p0)
> +{
> +    page_protect(p0);
> +}
> +
> +static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1)
> +{
> +    page_protect(p1);
> +}
> +
> +static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { }
> +static inline void tb_unlock_pages(TranslationBlock *tb) { }
> +#else
> +void tb_lock_page0(tb_page_addr_t);
> +void tb_lock_page1(tb_page_addr_t, tb_page_addr_t);
> +void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
> +void tb_unlock_pages(TranslationBlock *);
> +#endif
> +
> +#ifdef CONFIG_SOFTMMU
> +void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
> +                                   unsigned size,
> +                                   uintptr_t retaddr);
> +#endif /* CONFIG_SOFTMMU */
> +
> +bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
> +
>   void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
>   
>   #endif
> diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
> index 396fa6f4a6b..e9eaab223f9 100644
> --- a/accel/tcg/cpu-exec.c
> +++ b/accel/tcg/cpu-exec.c
> @@ -41,6 +41,7 @@
>   #include "tb-jmp-cache.h"
>   #include "tb-hash.h"
>   #include "tb-context.h"
> +#include "tb-internal.h"
>   #include "internal-common.h"
>   #include "internal-target.h"
>   
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index 451cf13e876..4f6eebd90ec 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -40,6 +40,7 @@
>   #include "tb-internal.h"
>   #include "trace.h"
>   #include "tb-hash.h"
> +#include "tb-internal.h"
>   #include "internal-common.h"
>   #include "internal-target.h"
>   #ifdef CONFIG_PLUGIN
> diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
> index bdf5a0b7d58..8e272cf790f 100644
> --- a/accel/tcg/tb-maint.c
> +++ b/accel/tcg/tb-maint.c
> @@ -30,6 +30,7 @@
>   #include "tcg/tcg.h"
>   #include "tb-hash.h"
>   #include "tb-context.h"
> +#include "tb-internal.h"
>   #include "internal-common.h"
>   #include "internal-target.h"
>   
> diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
> index bad3fce0ffb..572a8a87972 100644
> --- a/accel/tcg/translate-all.c
> +++ b/accel/tcg/translate-all.c
> @@ -62,6 +62,7 @@
>   #include "tb-jmp-cache.h"
>   #include "tb-hash.h"
>   #include "tb-context.h"
> +#include "tb-internal.h"
>   #include "internal-common.h"
>   #include "internal-target.h"
>   #include "tcg/perf.h"
> diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
> index ff5dabc9014..ce5eae4349e 100644
> --- a/accel/tcg/translator.c
> +++ b/accel/tcg/translator.c
> @@ -19,6 +19,7 @@
>   #include "tcg/tcg-op-common.h"
>   #include "internal-target.h"
>   #include "disas/disas.h"
> +#include "tb-internal.h"
>   
>   static void set_can_do_io(DisasContextBase *db, bool val)
>   {

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff mbox series

Patch

diff --git a/accel/tcg/internal-target.h b/accel/tcg/internal-target.h
index 0437d798295..1cfa318dc6c 100644
--- a/accel/tcg/internal-target.h
+++ b/accel/tcg/internal-target.h
@@ -36,42 +36,10 @@  static inline void page_table_config_init(void) { }
 void page_table_config_init(void);
 #endif
 
-#ifdef CONFIG_USER_ONLY
-#include "user/page-protection.h"
-/*
- * For user-only, page_protect sets the page read-only.
- * Since most execution is already on read-only pages, and we'd need to
- * account for other TBs on the same page, defer undoing any page protection
- * until we receive the write fault.
- */
-static inline void tb_lock_page0(tb_page_addr_t p0)
-{
-    page_protect(p0);
-}
-
-static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1)
-{
-    page_protect(p1);
-}
-
-static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { }
-static inline void tb_unlock_pages(TranslationBlock *tb) { }
-#else
-void tb_lock_page0(tb_page_addr_t);
-void tb_lock_page1(tb_page_addr_t, tb_page_addr_t);
-void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
-void tb_unlock_pages(TranslationBlock *);
-#endif
-
 #ifdef CONFIG_SOFTMMU
-void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
-                                   unsigned size,
-                                   uintptr_t retaddr);
 G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
 #endif /* CONFIG_SOFTMMU */
 
-bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
-
 /**
  * tcg_req_mo:
  * @type: TCGBar
diff --git a/accel/tcg/tb-internal.h b/accel/tcg/tb-internal.h
index 8313f90fd71..90be61f296a 100644
--- a/accel/tcg/tb-internal.h
+++ b/accel/tcg/tb-internal.h
@@ -9,6 +9,45 @@ 
 #ifndef ACCEL_TCG_TB_INTERNAL_TARGET_H
 #define ACCEL_TCG_TB_INTERNAL_TARGET_H
 
+#include "exec/cpu-all.h"
+#include "exec/exec-all.h"
+#include "exec/translation-block.h"
+
+#ifdef CONFIG_USER_ONLY
+#include "user/page-protection.h"
+/*
+ * For user-only, page_protect sets the page read-only.
+ * Since most execution is already on read-only pages, and we'd need to
+ * account for other TBs on the same page, defer undoing any page protection
+ * until we receive the write fault.
+ */
+static inline void tb_lock_page0(tb_page_addr_t p0)
+{
+    page_protect(p0);
+}
+
+static inline void tb_lock_page1(tb_page_addr_t p0, tb_page_addr_t p1)
+{
+    page_protect(p1);
+}
+
+static inline void tb_unlock_page1(tb_page_addr_t p0, tb_page_addr_t p1) { }
+static inline void tb_unlock_pages(TranslationBlock *tb) { }
+#else
+void tb_lock_page0(tb_page_addr_t);
+void tb_lock_page1(tb_page_addr_t, tb_page_addr_t);
+void tb_unlock_page1(tb_page_addr_t, tb_page_addr_t);
+void tb_unlock_pages(TranslationBlock *);
+#endif
+
+#ifdef CONFIG_SOFTMMU
+void tb_invalidate_phys_range_fast(ram_addr_t ram_addr,
+                                   unsigned size,
+                                   uintptr_t retaddr);
+#endif /* CONFIG_SOFTMMU */
+
+bool tb_invalidate_phys_page_unwind(tb_page_addr_t addr, uintptr_t pc);
+
 void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr);
 
 #endif
diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c
index 396fa6f4a6b..e9eaab223f9 100644
--- a/accel/tcg/cpu-exec.c
+++ b/accel/tcg/cpu-exec.c
@@ -41,6 +41,7 @@ 
 #include "tb-jmp-cache.h"
 #include "tb-hash.h"
 #include "tb-context.h"
+#include "tb-internal.h"
 #include "internal-common.h"
 #include "internal-target.h"
 
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 451cf13e876..4f6eebd90ec 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -40,6 +40,7 @@ 
 #include "tb-internal.h"
 #include "trace.h"
 #include "tb-hash.h"
+#include "tb-internal.h"
 #include "internal-common.h"
 #include "internal-target.h"
 #ifdef CONFIG_PLUGIN
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index bdf5a0b7d58..8e272cf790f 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -30,6 +30,7 @@ 
 #include "tcg/tcg.h"
 #include "tb-hash.h"
 #include "tb-context.h"
+#include "tb-internal.h"
 #include "internal-common.h"
 #include "internal-target.h"
 
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index bad3fce0ffb..572a8a87972 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -62,6 +62,7 @@ 
 #include "tb-jmp-cache.h"
 #include "tb-hash.h"
 #include "tb-context.h"
+#include "tb-internal.h"
 #include "internal-common.h"
 #include "internal-target.h"
 #include "tcg/perf.h"
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index ff5dabc9014..ce5eae4349e 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -19,6 +19,7 @@ 
 #include "tcg/tcg-op-common.h"
 #include "internal-target.h"
 #include "disas/disas.h"
+#include "tb-internal.h"
 
 static void set_can_do_io(DisasContextBase *db, bool val)
 {