diff mbox series

[PATCH-for-10.0,2/3] hw/char/riscv_htif: Explicit little-endian implementation

Message ID 20241129154304.34946-3-philmd@linaro.org
State Accepted
Commit be0a70b93f4ff3dda77b9db50ec452f03170ff9a
Headers show
Series hw/char/riscv_htif: Remove tswap64() calls | expand

Commit Message

Philippe Mathieu-Daudé Nov. 29, 2024, 3:43 p.m. UTC
Since our RISC-V system emulation is only built for little
endian, the HTIF device aims to interface with little endian
memory accesses, thus we can explicit htif_mm_ops:endianness
being DEVICE_LITTLE_ENDIAN.

In that case tswap64() is equivalent to le64_to_cpu(), as in
"convert this 64-bit little-endian value into host cpu order".
Replace to simplify.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/char/riscv_htif.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

Comments

Daniel Henrique Barboza Nov. 29, 2024, 5:05 p.m. UTC | #1
On 11/29/24 12:43 PM, Philippe Mathieu-Daudé wrote:
> Since our RISC-V system emulation is only built for little
> endian, the HTIF device aims to interface with little endian
> memory accesses, thus we can explicit htif_mm_ops:endianness
> being DEVICE_LITTLE_ENDIAN.
> 
> In that case tswap64() is equivalent to le64_to_cpu(), as in
> "convert this 64-bit little-endian value into host cpu order".
> Replace to simplify.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---

Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

>   hw/char/riscv_htif.c | 11 ++++++-----
>   1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
> index 0345088e8b3..3f84d8d6738 100644
> --- a/hw/char/riscv_htif.c
> +++ b/hw/char/riscv_htif.c
> @@ -29,7 +29,7 @@
>   #include "qemu/timer.h"
>   #include "qemu/error-report.h"
>   #include "exec/address-spaces.h"
> -#include "exec/tswap.h"
> +#include "qemu/bswap.h"
>   #include "sysemu/dma.h"
>   #include "sysemu/runstate.h"
>   
> @@ -212,11 +212,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
>               } else {
>                   uint64_t syscall[8];
>                   cpu_physical_memory_read(payload, syscall, sizeof(syscall));
> -                if (tswap64(syscall[0]) == PK_SYS_WRITE &&
> -                    tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
> -                    tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
> +                if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE &&
> +                    le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE &&
> +                    le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
>                       uint8_t ch;
> -                    cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
> +                    cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1);
>                       /*
>                        * XXX this blocks entire thread. Rewrite to use
>                        * qemu_chr_fe_write and background I/O callbacks
> @@ -324,6 +324,7 @@ static void htif_mm_write(void *opaque, hwaddr addr,
>   static const MemoryRegionOps htif_mm_ops = {
>       .read = htif_mm_read,
>       .write = htif_mm_write,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
>   };
>   
>   HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
Alistair Francis Dec. 3, 2024, 5:54 a.m. UTC | #2
On Sat, Nov 30, 2024 at 12:43 AM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> Since our RISC-V system emulation is only built for little
> endian, the HTIF device aims to interface with little endian
> memory accesses, thus we can explicit htif_mm_ops:endianness
> being DEVICE_LITTLE_ENDIAN.
>
> In that case tswap64() is equivalent to le64_to_cpu(), as in
> "convert this 64-bit little-endian value into host cpu order".
> Replace to simplify.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/char/riscv_htif.c | 11 ++++++-----
>  1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
> index 0345088e8b3..3f84d8d6738 100644
> --- a/hw/char/riscv_htif.c
> +++ b/hw/char/riscv_htif.c
> @@ -29,7 +29,7 @@
>  #include "qemu/timer.h"
>  #include "qemu/error-report.h"
>  #include "exec/address-spaces.h"
> -#include "exec/tswap.h"
> +#include "qemu/bswap.h"
>  #include "sysemu/dma.h"
>  #include "sysemu/runstate.h"
>
> @@ -212,11 +212,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
>              } else {
>                  uint64_t syscall[8];
>                  cpu_physical_memory_read(payload, syscall, sizeof(syscall));
> -                if (tswap64(syscall[0]) == PK_SYS_WRITE &&
> -                    tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
> -                    tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
> +                if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE &&
> +                    le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE &&
> +                    le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
>                      uint8_t ch;
> -                    cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
> +                    cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1);
>                      /*
>                       * XXX this blocks entire thread. Rewrite to use
>                       * qemu_chr_fe_write and background I/O callbacks
> @@ -324,6 +324,7 @@ static void htif_mm_write(void *opaque, hwaddr addr,
>  static const MemoryRegionOps htif_mm_ops = {
>      .read = htif_mm_read,
>      .write = htif_mm_write,
> +    .endianness = DEVICE_LITTLE_ENDIAN,
>  };
>
>  HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
> --
> 2.45.2
>
>
diff mbox series

Patch

diff --git a/hw/char/riscv_htif.c b/hw/char/riscv_htif.c
index 0345088e8b3..3f84d8d6738 100644
--- a/hw/char/riscv_htif.c
+++ b/hw/char/riscv_htif.c
@@ -29,7 +29,7 @@ 
 #include "qemu/timer.h"
 #include "qemu/error-report.h"
 #include "exec/address-spaces.h"
-#include "exec/tswap.h"
+#include "qemu/bswap.h"
 #include "sysemu/dma.h"
 #include "sysemu/runstate.h"
 
@@ -212,11 +212,11 @@  static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
             } else {
                 uint64_t syscall[8];
                 cpu_physical_memory_read(payload, syscall, sizeof(syscall));
-                if (tswap64(syscall[0]) == PK_SYS_WRITE &&
-                    tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
-                    tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
+                if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE &&
+                    le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE &&
+                    le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
                     uint8_t ch;
-                    cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
+                    cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1);
                     /*
                      * XXX this blocks entire thread. Rewrite to use
                      * qemu_chr_fe_write and background I/O callbacks
@@ -324,6 +324,7 @@  static void htif_mm_write(void *opaque, hwaddr addr,
 static const MemoryRegionOps htif_mm_ops = {
     .read = htif_mm_read,
     .write = htif_mm_write,
+    .endianness = DEVICE_LITTLE_ENDIAN,
 };
 
 HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,