diff mbox series

[V5,2/2] arm64: dts: qcom: qcs8300: add TRNG node

Message ID 20241125064317.1748451-3-quic_yrangana@quicinc.com
State New
Headers show
Series Enable TRNG for QCS8300 | expand

Commit Message

Yuvaraj Ranganathan Nov. 25, 2024, 6:43 a.m. UTC 
The qcs8300 SoC has a True Random Number Generator, add the node with
the correct compatible set.

Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qcs8300.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Dmitry Baryshkov Nov. 25, 2024, 5:04 p.m. UTC | #1 
On Mon, Nov 25, 2024 at 12:13:17PM +0530, Yuvaraj Ranganathan wrote:
> The qcs8300 SoC has a True Random Number Generator, add the node with
> the correct compatible set.
> 
> Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qcs8300.dtsi | 5 +++++
>  1 file changed, 5 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
index 2c35f96c3f28..39c0c6b8516d 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
@@ -588,6 +588,11 @@  &clk_virt SLAVE_QUP_CORE_0 0>,
 			};
 		};
 
+		rng: rng@10d2000 {
+			compatible = "qcom,qcs8300-trng", "qcom,trng";
+			reg = <0x0 0x010d2000 0x0 0x1000>;
+		};
+
 		config_noc: interconnect@14c0000 {
 			compatible = "qcom,qcs8300-config-noc";
 			reg = <0x0 0x014c0000 0x0 0x13080>;