| Message ID | 20241025161501.485684-20-miquel.raynal@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | spi-nand/spi-mem DTR support | expand |
do you want the linux stable teams scripts to queue this patch to stable? if not, maybe update the commit subject with s/Fix/update? Or use Cc: <stable+noautosel@kernel.org> # reason goes here, and must be present
On 11/11/24 2:27 PM, Tudor Ambarus wrote: > do you want the linux stable teams scripts to queue this patch to stable? > > if not, maybe update the commit subject with s/Fix/update? Or use > Cc: <stable+noautosel@kernel.org> # reason goes here, and must be present If this is a fix, would be good to separate it from the series and send it as an individual patch with stable tag.
On 18/12/2024 at 08:16:39 GMT, Tudor Ambarus <tudor.ambarus@linaro.org> wrote: > On 11/11/24 2:27 PM, Tudor Ambarus wrote: >> do you want the linux stable teams scripts to queue this patch to stable? >> >> if not, maybe update the commit subject with s/Fix/update? Or use >> Cc: <stable+noautosel@kernel.org> # reason goes here, and must be present > > If this is a fix, would be good to separate it from the series and send > it as an individual patch with stable tag. I actually ignored the "noautosel" thing :) It looks like I didn't answer, but I decided it was not worth backporting it and used your trick. Thanks! Miquèl
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c index 329377bf3717..686e872fe0ff 100644 --- a/drivers/mtd/nand/spi/winbond.c +++ b/drivers/mtd/nand/spi/winbond.c @@ -10,6 +10,7 @@ #include <linux/device.h> #include <linux/kernel.h> #include <linux/mtd/spinand.h> +#include <linux/units.h> #define SPINAND_MFR_WINBOND 0xEF @@ -17,6 +18,14 @@ #define W25N04KV_STATUS_ECC_5_8_BITFLIPS (3 << 4) +static SPINAND_OP_VARIANTS(read_cache_dtr_variants, + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_FAST_OP(0, 1, NULL, 0), + SPINAND_PAGE_READ_FROM_CACHE_OP(0, 1, NULL, 0, 54 * HZ_PER_MHZ)); + static SPINAND_OP_VARIANTS(read_cache_variants, SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), @@ -177,7 +186,7 @@ static const struct spinand_info winbond_spinand_table[] = { SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbc, 0x21), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), NAND_ECCREQ(1, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&read_cache_dtr_variants, &write_cache_variants, &update_cache_variants), 0, @@ -197,7 +206,7 @@ static const struct spinand_info winbond_spinand_table[] = { SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xbf, 0x22), NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 2, 1), NAND_ECCREQ(1, 512), - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + SPINAND_INFO_OP_VARIANTS(&read_cache_dtr_variants, &write_cache_variants, &update_cache_variants), 0,
W25N01JW and W25N02JW use a different technology with higher frequencies supported (up to 166MHz). There is one drawback though, the slowest READ_FROM_CACHE command cannot run above 54MHz. Because of that, we need to set a limit for these chips on the basic READ_FROM_CACHE variant. Duplicating this list is not a problem because these chips have DTR support, and the list of supported variants will diverge from all the other chips when adding support for it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- drivers/mtd/nand/spi/winbond.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)