| Message ID | 20241022104600.3228-1-quic_janathot@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v3] arm64: dts: qcom: qcs6490-rb3gen2: enable Bluetooth | expand |
On 22/10/2024 12:46, Janaki Ramaiah Thota wrote: > Add Bluetooth and UART7 support for qcs6490-rb3gen2. > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 122 ++++++++++++++++++- > 1 file changed, 121 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > index 0d45662b8028..b774d89172ea 100644 > --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts > @@ -1,6 +1,6 @@ > // SPDX-License-Identifier: BSD-3-Clause > /* > - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. > + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. > */ > > /dts-v1/; > @@ -31,7 +31,9 @@ > chassis-type = "embedded"; > > aliases { > + bluetooth0 = &bluetooth; Which driver uses this alias? > serial0 = &uart5; > + serial1 = &uart7; > }; ... > }; > > &uart5 { > status = "okay"; > }; > > +&uart7 { > + status = "okay"; > + /delete-property/interrupts; > + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, > + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default", "sleep"; > + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, > + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; This could be just one phandle to state node with multiple pins subnode. > + > + bluetooth: bluetooth { > + compatible = "qcom,wcn6750-bt"; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_en>, <&sw_ctrl>; > + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; > + vddaon-supply = <&vreg_s7b_0p972>; > + vddbtcxmx-supply = <&vreg_s7b_0p972>; > + vddrfacmn-supply = <&vreg_s7b_0p972>; > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > + vddasd-supply = <&vreg_l11c_2p8>; > + max-speed = <3200000>; There were warnings in the past. Please confirm that you addressed them and this is warning free. Best regards, Krzysztof
On Tue, Oct 22, 2024 at 04:16:00PM +0530, Janaki Ramaiah Thota wrote: > Add Bluetooth and UART7 support for qcs6490-rb3gen2. > > Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> > --- > arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 122 ++++++++++++++++++- > 1 file changed, 121 insertions(+), 1 deletion(-) > [...] > > +&uart7 { > + status = "okay"; > + /delete-property/interrupts; > + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, > + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; > + pinctrl-names = "default", "sleep"; > + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, > + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; > + > + bluetooth: bluetooth { > + compatible = "qcom,wcn6750-bt"; > + pinctrl-names = "default"; > + pinctrl-0 = <&bt_en>, <&sw_ctrl>; > + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; > + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; > + vddaon-supply = <&vreg_s7b_0p972>; > + vddbtcxmx-supply = <&vreg_s7b_0p972>; > + vddrfacmn-supply = <&vreg_s7b_0p972>; > + vddrfa0p8-supply = <&vreg_s7b_0p972>; > + vddrfa1p7-supply = <&vreg_s1b_1p872>; > + vddrfa1p2-supply = <&vreg_s8b_1p272>; > + vddrfa2p2-supply = <&vreg_s1c_2p19>; > + vddasd-supply = <&vreg_l11c_2p8>; No, this is not correct, these supplies are connected to the on-chip PMU. Please add PMU node and use pwrseq subsystem to power up the BT. > + max-speed = <3200000>; > + }; > +}; > + > &usb_1 { > status = "okay"; > }; > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >
Hi Krzysztof, Thanks for the valuable review comments. On 10/22/2024 5:57 PM, Krzysztof Kozlowski wrote: > On 22/10/2024 12:46, Janaki Ramaiah Thota wrote: >> Add Bluetooth and UART7 support for qcs6490-rb3gen2. >> >> Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 122 ++++++++++++++++++- >> 1 file changed, 121 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> index 0d45662b8028..b774d89172ea 100644 >> --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts >> @@ -1,6 +1,6 @@ >> // SPDX-License-Identifier: BSD-3-Clause >> /* >> - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. >> + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. >> */ >> >> /dts-v1/; >> @@ -31,7 +31,9 @@ >> chassis-type = "embedded"; >> >> aliases { >> + bluetooth0 = &bluetooth; > > Which driver uses this alias? > >> serial0 = &uart5; >> + serial1 = &uart7; >> }; > > ... > > >> }; >> >> &uart5 { >> status = "okay"; >> }; >> >> +&uart7 { >> + status = "okay"; >> + /delete-property/interrupts; >> + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, >> + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; > > >> + pinctrl-names = "default", "sleep"; >> + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, >> + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; > > This could be just one phandle to state node with multiple pins subnode. > Since we have different configuration for 3 GPIOs, it’s not good to combine all 4 GPIOs into one common sleep configuration. Each GPIO configuration is having separate requirements based on the Bluetooth SOC. This is as per hardware recommendations. >> + >> + bluetooth: bluetooth { >> + compatible = "qcom,wcn6750-bt"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&bt_en>, <&sw_ctrl>; >> + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; >> + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; >> + vddaon-supply = <&vreg_s7b_0p972>; >> + vddbtcxmx-supply = <&vreg_s7b_0p972>; >> + vddrfacmn-supply = <&vreg_s7b_0p972>; >> + vddrfa0p8-supply = <&vreg_s7b_0p972>; >> + vddrfa1p7-supply = <&vreg_s1b_1p872>; >> + vddrfa1p2-supply = <&vreg_s8b_1p272>; >> + vddrfa2p2-supply = <&vreg_s1c_2p19>; >> + vddasd-supply = <&vreg_l11c_2p8>; >> + max-speed = <3200000>; > > There were warnings in the past. Please confirm that you addressed them > and this is warning free. > Sure. > Best regards, > Krzysztof > Thanks, Janakiram
On 02/12/2024 10:32, Janaki Ramaiah Thota wrote: >> >>> + pinctrl-names = "default", "sleep"; >>> + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, >>> + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; >> >> This could be just one phandle to state node with multiple pins subnode. >> > > Since we have different configuration for 3 GPIOs, it’s not good to > combine all 4 GPIOs into one common sleep configuration. Each GPIO > configuration is having separate requirements based on the Bluetooth SOC. I did not propose that. Please read bindings and other existing DTS sources. > This is as per hardware recommendations. Best regards, Krzysztof
On 2.12.2024 10:36 AM, Krzysztof Kozlowski wrote: > On 02/12/2024 10:32, Janaki Ramaiah Thota wrote: >>> >>>> + pinctrl-names = "default", "sleep"; >>>> + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, >>>> + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; >>> >>> This could be just one phandle to state node with multiple pins subnode. >>> >> >> Since we have different configuration for 3 GPIOs, it’s not good to >> combine all 4 GPIOs into one common sleep configuration. Each GPIO >> configuration is having separate requirements based on the Bluetooth SOC. > > I did not propose that. Please read bindings and other existing DTS sources. Janaki, you can refer to my older patch (attached) Konrad
On 12/2/2024 4:56 PM, Konrad Dybcio wrote: > On 2.12.2024 10:36 AM, Krzysztof Kozlowski wrote: >> On 02/12/2024 10:32, Janaki Ramaiah Thota wrote: >>>> >>>>> + pinctrl-names = "default", "sleep"; >>>>> + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, >>>>> + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; >>>> >>>> This could be just one phandle to state node with multiple pins subnode. >>>> >>> >>> Since we have different configuration for 3 GPIOs, it’s not good to >>> combine all 4 GPIOs into one common sleep configuration. Each GPIO >>> configuration is having separate requirements based on the Bluetooth SOC. >> >> I did not propose that. Please read bindings and other existing DTS sources. > > Janaki, > > you can refer to my older patch (attached) > > Konrad Thank you very much for the information Konrad. Thanks, Janakiram
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts index 0d45662b8028..b774d89172ea 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -31,7 +31,9 @@ chassis-type = "embedded"; aliases { + bluetooth0 = &bluetooth; serial0 = &uart5; + serial1 = &uart7; }; chosen { @@ -688,6 +690,39 @@ status = "okay"; }; +&qup_uart7_cts { + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; +}; + +&qup_uart7_rts { + /* We'll drive RTS, so no pull */ + drive-strength = <2>; + bias-disable; +}; + +&qup_uart7_rx { + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module is + * in tri-state (module powered off or not driving the + * signal yet). + */ + bias-pull-up; +}; + +&qup_uart7_tx { + /* We'll drive TX, so no pull */ + drive-strength = <2>; + bias-disable; +}; + &qupv3_id_0 { status = "okay"; }; @@ -719,12 +754,97 @@ &tlmm { gpio-reserved-ranges = <32 2>, /* ADSP */ <48 4>; /* NFC */ + bt_en: bt-en-state { + pins = "gpio85"; + function = "gpio"; + output-low; + bias-disable; + }; + + qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { + pins = "gpio28"; + function = "gpio"; + /* + * Configure a bias-bus-hold on CTS to lower power + * usage when Bluetooth is turned off. Bus hold will + * maintain a low power state regardless of whether + * the Bluetooth module drives the pin in either + * direction or leaves the pin fully unpowered. + */ + bias-bus-hold; + }; + + qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { + pins = "gpio29"; + function = "gpio"; + /* + * Configure pull-down on RTS. As RTS is active low + * signal, pull it low to indicate the BT SoC that it + * can wakeup the system anytime from suspend state by + * pulling RX low (by sending wakeup bytes). + */ + bias-pull-down; + }; + + qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { + pins = "gpio31"; + function = "gpio"; + /* + * Configure a pull-up on RX. This is needed to avoid + * garbage data when the TX pin of the Bluetooth module + * is floating which may cause spurious wakeups. + */ + bias-pull-up; + }; + + qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { + pins = "gpio30"; + function = "gpio"; + /* + * Configure pull-up on TX when it isn't actively driven + * to prevent BT SoC from receiving garbage during sleep. + */ + bias-pull-up; + }; + + sw_ctrl: sw-ctrl-state { + pins = "gpio86"; + function = "gpio"; + bias-pull-down; + }; }; &uart5 { status = "okay"; }; +&uart7 { + status = "okay"; + /delete-property/interrupts; + interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, + <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default", "sleep"; + pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, + <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; + + bluetooth: bluetooth { + compatible = "qcom,wcn6750-bt"; + pinctrl-names = "default"; + pinctrl-0 = <&bt_en>, <&sw_ctrl>; + enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; + swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; + vddaon-supply = <&vreg_s7b_0p972>; + vddbtcxmx-supply = <&vreg_s7b_0p972>; + vddrfacmn-supply = <&vreg_s7b_0p972>; + vddrfa0p8-supply = <&vreg_s7b_0p972>; + vddrfa1p7-supply = <&vreg_s1b_1p872>; + vddrfa1p2-supply = <&vreg_s8b_1p272>; + vddrfa2p2-supply = <&vreg_s1c_2p19>; + vddasd-supply = <&vreg_l11c_2p8>; + max-speed = <3200000>; + }; +}; + &usb_1 { status = "okay"; };
Add Bluetooth and UART7 support for qcs6490-rb3gen2. Signed-off-by: Janaki Ramaiah Thota <quic_janathot@quicinc.com> --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 122 ++++++++++++++++++- 1 file changed, 121 insertions(+), 1 deletion(-)