| Message ID | 20241005064307.18972-1-quic_rdwivedi@quicinc.com |
|---|---|
| Headers | show |
| Series | Add support for multiple ICE algorithms | expand |
On Sat, 05 Oct 2024 12:13:05 +0530, Ram Kumar Dwivedi wrote: > There are three algorithms supported for inline crypto engine: > Floor based, Static and Instantaneous algorithm. > > Document the compatible used for the algorithm configurations > for inline crypto engine found. > > Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> > Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> > Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com> > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> > Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> > --- > .../devicetree/bindings/ufs/qcom,ufs.yaml | 24 +++++++++++++++++++ > 1 file changed, 24 insertions(+) > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/qcom,ufs.example.dtb: alg3: status: 'oneOf' conditional failed, one must be fixed: ['ok'] is not of type 'object' 'ok' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe'] from schema $id: http://devicetree.org/schemas/dt-core.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241005064307.18972-2-quic_rdwivedi@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On Sat, Oct 05, 2024 at 12:13:05PM +0530, Ram Kumar Dwivedi wrote: > There are three algorithms supported for inline crypto engine: > Floor based, Static and Instantaneous algorithm. No. The algorithms supported by ICE are AES-XTS, AES-ECB, AES-CBC, etc. So I'm afraid this terminology is already taken. This new thing seems to be about how work is distributed among different hardware cores, so calling these "ICE schedulers" or something might make sense. - Eric
On 05/10/2024 08:43, Ram Kumar Dwivedi wrote: > There are three algorithms supported for inline crypto engine: > Floor based, Static and Instantaneous algorithm. > > Add ice algorithm entries and enable instantaneous algorithm > by default. > > Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> > Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> > Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com> > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> > Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sm8650.dtsi | 19 +++++++++++++++++++ > 1 file changed, 19 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi > index 9d9bbb9aca64..56a7ca6a3af4 100644 > --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi > @@ -2590,6 +2590,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, > #reset-cells = <1>; > > status = "disabled"; > + > + ice_cfg: ice-config { > + alg1 { > + alg-name = "alg1"; > + rx-alloc-percent = <60>; > + status = "disabled"; > + }; > + > + alg2 { > + alg-name = "alg2"; > + status = "disabled"; > + }; > + > + alg3 { > + alg-name = "alg3"; > + num-core = <28 28 15 13>; > + status = "ok"; NAK. This has so many issues... First, describes OS policy. Second, there is no "ok". Best regards, Krzysztof
On 05-Oct-24 7:54 PM, Rob Herring (Arm) wrote: > > On Sat, 05 Oct 2024 12:13:05 +0530, Ram Kumar Dwivedi wrote: >> There are three algorithms supported for inline crypto engine: >> Floor based, Static and Instantaneous algorithm. >> >> Document the compatible used for the algorithm configurations >> for inline crypto engine found. >> >> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >> Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com> >> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> >> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> >> --- >> .../devicetree/bindings/ufs/qcom,ufs.yaml | 24 +++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> > > My bot found errors running 'make dt_binding_check' on your patch: > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/qcom,ufs.example.dtb: alg3: status: 'oneOf' conditional failed, one must be fixed: > ['ok'] is not of type 'object' > 'ok' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe'] > from schema $id: http://devicetree.org/schemas/dt-core.yaml# > Hi Rob, I have addressed the comment in the latest patch set. Now the dt binding is successfully compiling. Thanks, Ram. > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20241005064307.18972-2-quic_rdwivedi@quicinc.com > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. >
On 06-Oct-24 2:02 PM, Krzysztof Kozlowski wrote: > On 05/10/2024 08:43, Ram Kumar Dwivedi wrote: >> There are three algorithms supported for inline crypto engine: >> Floor based, Static and Instantaneous algorithm. >> >> Add ice algorithm entries and enable instantaneous algorithm >> by default. >> >> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >> Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com> >> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> >> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sm8650.dtsi | 19 +++++++++++++++++++ >> 1 file changed, 19 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >> index 9d9bbb9aca64..56a7ca6a3af4 100644 >> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >> @@ -2590,6 +2590,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, >> #reset-cells = <1>; >> >> status = "disabled"; >> + >> + ice_cfg: ice-config { >> + alg1 { >> + alg-name = "alg1"; >> + rx-alloc-percent = <60>; >> + status = "disabled"; >> + }; >> + >> + alg2 { >> + alg-name = "alg2"; >> + status = "disabled"; >> + }; >> + >> + alg3 { >> + alg-name = "alg3"; >> + num-core = <28 28 15 13>; >> + status = "ok"; > > NAK. This has so many issues... First, describes OS policy. Second, > there is no "ok". > Hi Krzysztof, I have updated the status to "okay" in latest patchset and updated the alg-name with actual allocator name. I have already mentioned default allocator as instantaneous. Sorry, I did not understand OS policy comment, could you please explain? Thanks, Ram. > Best regards, > Krzysztof >
On 06-Oct-24 12:45 AM, Eric Biggers wrote: > On Sat, Oct 05, 2024 at 12:13:05PM +0530, Ram Kumar Dwivedi wrote: >> There are three algorithms supported for inline crypto engine: >> Floor based, Static and Instantaneous algorithm. > > No. The algorithms supported by ICE are AES-XTS, AES-ECB, AES-CBC, etc. So I'm > afraid this terminology is already taken. > > This new thing seems to be about how work is distributed among different > hardware cores, so calling these "ICE schedulers" or something might make sense. > > - Eric Hi Eric, I have rephrased patch commit description. Used terminology as ICE allocator instead of ICE algorithm. Thanks, Ram.
On 29/10/2024 12:06, Ram Kumar Dwivedi wrote: > > > On 06-Oct-24 2:02 PM, Krzysztof Kozlowski wrote: >> On 05/10/2024 08:43, Ram Kumar Dwivedi wrote: >>> There are three algorithms supported for inline crypto engine: >>> Floor based, Static and Instantaneous algorithm. >>> >>> Add ice algorithm entries and enable instantaneous algorithm >>> by default. >>> >>> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >>> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com> >>> Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com> >>> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> >>> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com> >>> --- >>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 19 +++++++++++++++++++ >>> 1 file changed, 19 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> index 9d9bbb9aca64..56a7ca6a3af4 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>> @@ -2590,6 +2590,25 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, >>> #reset-cells = <1>; >>> >>> status = "disabled"; >>> + >>> + ice_cfg: ice-config { >>> + alg1 { >>> + alg-name = "alg1"; >>> + rx-alloc-percent = <60>; >>> + status = "disabled"; >>> + }; >>> + >>> + alg2 { >>> + alg-name = "alg2"; >>> + status = "disabled"; >>> + }; >>> + >>> + alg3 { >>> + alg-name = "alg3"; >>> + num-core = <28 28 15 13>; >>> + status = "ok"; >> >> NAK. This has so many issues... First, describes OS policy. Second, >> there is no "ok". >> > Hi Krzysztof, > I have updated the status to "okay" in latest patchset Still no. Why this node needs it? > and updated the alg-name with actual allocator name. Please wrap your replies according to mailing list style. But anyway, all your algs sound like OS policy. > I have already mentioned default allocator as instantaneous. Sorry, I did not understand OS policy comment, could you please explain? This looks like OS policy, OS choice. DT does not describe such things. Best regards, Krzysztof