| Message ID | 20240927063108.2773304-1-quic_msavaliy@quicinc.com |
|---|---|
| Headers | show |
| Series | Enable shared SE support over I2C | expand |
On 27.09.2024 11:24 AM, Krzysztof Kozlowski wrote: > On Fri, Sep 27, 2024 at 12:01:05PM +0530, Mukesh Kumar Savaliya wrote: >> Adds qcom,shared-se flag usage. Use this when particular I2C serial >> controller needs to be shared between two subsystems. >> >> SE = Serial Engine, meant for I2C controller here. >> TRE = Transfer Ring Element, refers to Queued Descriptor. >> SS = Subsystems (APPS processor, Modem, TZ, ADSP etc). >> >> Example : >> Two clients from different SS can share an I2C SE for same slave device >> OR their owned slave devices. >> Assume I2C Slave EEPROM device connected with I2C controller. >> Each client from ADSP SS and APPS Linux SS can perform i2c transactions. >> This gets serialized by lock TRE + DMA Transfers + Unlock TRE at HW level. >> >> Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com> >> --- >> Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml >> index 9f66a3bb1f80..3b9b20a0edff 100644 >> --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml >> +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml >> @@ -60,6 +60,10 @@ properties: >> power-domains: >> maxItems: 1 >> >> + qcom,shared-se: >> + description: True if I2C needs to be shared between two or more subsystems(SS). > > The "SS" and subsystem should be explained in the binding. Please do not > use some qcom-specific abbreviations here, but explain exactly, e.g. > processors like application processor and DSP. > > "se" is also not explained in the binding - please open it and look for > such explanation. > > This all should be rephrased to make it clear... We talked about this > and I do not see much of improvements except commit msg, so we are > making circles. I don't know, get someone internally to help you in > upstreaming this. > > Is sharing of IP blocks going to be also for other devices? If yes, then > this should be one property for all Qualcomm devices. If not, then be > sure that this is the case because I will bring it up if you come with > one more solution for something else. As far as I understand, everything that's not protocol-specific (in this case it would be I2C tunables etc.) is common across all protocols supported by the serial engine. Konrad
This Series adds support to share QUP (Qualcomm Unified peripheral) based I2C SE (Serial Engine) controller between two subsystems (Apps/ADSP/TZ etc). Each SS having it's own dedicated GPII(General Purpose Interface Instance) acting as pipe between SE and GSI(Generic SW- Interface) DMA HW engine. Hence the sharing of SE is possible only with I2C SE in GSI mode, not with FIFO/CPU DMA mode. Subsystem must acquire Lock over the SE so that it gets uninterrupted control till it unlocks the SE. It also makes sure the commonly shared TLMM GPIOs are not touched which can impact other subsystem or cause any interruption. Generally, GPIOs are being unconfigured during suspend time. GSI DMA engine is capable to perform requested transfer operations from any of the I2C client in a seamless way and its transparent to the subsystems. Make sure to enable “qcom,shared-se” flag only while enabling this feature. I2C client should add in its respective parent node. Example : Two clients from different SS can share an I2C SE for same slave device OR their owned slave devices. Assume I2C Slave EEPROM device connected with I2C controller. Each client from ADSP SS and APPS Linux SS can perform i2c transactions. This gets serialized by lock TRE + Transfers + Unlock TRE at HW level. Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com> --- Link to V2: https://lore.kernel.org/lkml/a88a16ff-3537-4396-b2ea-4ba02b4850e9@quicinc.com/T/ Changes in V3: - Added missing maintainers which i forgot to add. - Add cover letter with description of SS and EE for dt-bindings patch. - Added acronyms expansion to commit log. - [PATCH v2 3/4] : Removed exported symbol geni_se_clks_off(). Instead added changes to bypass pinctrl sleep configuration from geni_se_resources_off() function. - Changed title name of [PATCH v2 3/4] to reflect the suggested changes. - [PATCH v2 4/4] kept geni_i2c_runtime_suspend() as is and removed explicit call to geni_se_clks_off(). - Removed is_shared variable from i2c driver and instead used common shared_geni_se variable from qcom-geni-se.h so that other protocols can also extend for similar feature. - I2C driver log changed from dev_err() to dev_dbg() for timeout. - set gpi_mode = true if shared_geni_se is set for this usecase. Enhanced comments around code and commit log. --- Link to V1: https://lore.kernel.org/lkml/cb7613d0-586e-4089-a1b6-2405f4dc4883@quicinc.com/T/ Changes in V2: - Enhanced commit log grammatically for PATCH v1 3/4 as suggested by Bryan. - Updated Cover letter along with acronyms expansion. - Added maintainers list from other subsystems for review, which was missing. Thanks to Krzysztof for pointing out. - Added cover letter with an example of Serial Engine sharing. - Addressed review comments for all the patches. --- Mukesh Kumar Savaliya (4): dt-bindindgs: i2c: qcom,i2c-geni: Document shared flag dma: gpi: Add Lock and Unlock TRE support to access SE exclusively soc: qcom: geni-se: Do not keep GPIOs to sleep state for shared SE usecase i2c: i2c-qcom-geni: Enable i2c controller sharing between two subsystems .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++ drivers/dma/qcom/gpi.c | 37 ++++++++++++++++++- drivers/i2c/busses/i2c-qcom-geni.c | 24 ++++++++++-- drivers/soc/qcom/qcom-geni-se.c | 14 +++++-- include/linux/dma/qcom-gpi-dma.h | 6 +++ include/linux/soc/qcom/geni-se.h | 3 ++ 6 files changed, 79 insertions(+), 9 deletions(-)