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[v3,0/3] i2c: RTL9300 support

Message ID 20240923230230.3001657-1-chris.packham@alliedtelesis.co.nz
Headers show
Series i2c: RTL9300 support | expand

Message

Chris Packham Sept. 23, 2024, 11:02 p.m. UTC
This builds on top of my in-flight series that adds the syscon node for the
switch block[1]. The I2C controllers are part of that block of registers. The
controller driver is adapted from openwrt. From v2 of this series I've taken
the approach suggested by Rob and represented the SDA lines as child nodes. I
expect there will be a bit of discussion around the naming of the controller
nodes (in the Realtek documentation they are referred to as I2C_MST1 and
I2C_MST2).

[1] - https://lore.kernel.org/lkml/20240923225719.2999821-1-chris.packham@alliedtelesis.co.nz/

--
2.46.1

Chris Packham (3):
  dt-bindings: i2c: Add RTL9300 I2C controller
  i2c: Add driver for the RTL9300 I2C controller
  mips: dts: realtek: Add I2C controllers

 .../bindings/i2c/realtek,rtl9300-i2c.yaml     |  80 ++++
 MAINTAINERS                                   |   7 +
 arch/mips/boot/dts/realtek/rtl930x.dtsi       |  18 +
 drivers/i2c/busses/Kconfig                    |  10 +
 drivers/i2c/busses/Makefile                   |   1 +
 drivers/i2c/busses/i2c-rtl9300.c              | 421 ++++++++++++++++++
 6 files changed, 537 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
 create mode 100644 drivers/i2c/busses/i2c-rtl9300.c

Comments

Krzysztof Kozlowski Sept. 24, 2024, 8:50 a.m. UTC | #1
On Tue, Sep 24, 2024 at 11:02:30AM +1200, Chris Packham wrote:
> Add the I2C controllers that are part of the RTL9300 SoC.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
> 
> Notes:
>     Changes in v2:
>     - Use reg property
> 
>  arch/mips/boot/dts/realtek/rtl930x.dtsi | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
> index cf1b38b6c353..cc43025cd46c 100644
> --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
> +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
> @@ -33,12 +33,30 @@ lx_clk: clock-175mhz {
>  	switch0: switch@1b000000 {
>  		compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";
>  		reg = <0x1b000000 0x10000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
>  
>  		reboot {
>  			compatible = "syscon-reboot";
>  			offset = <0x0c>;
>  			value = <0x01>;
>  		};
> +
> +		i2c0: i2c@36c {
> +			compatible = "realtek,rtl9300-i2c";
> +			reg = <0x36c 0x14>;
> +			status = "disabled";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +		};

This should be sent as one series... You have dependency otherwise. Also
this points to issue of mixing nodes with and without unit address.

I think i2c children should be under some sort of "i2c" bus node.

Please propose entire realtek,rtl9302c-switch binding with the I2C. It's
very confusing to see it partial.


Best regards,
Krzysztof
Chris Packham Sept. 24, 2024, 9:11 p.m. UTC | #2
On 24/09/24 20:55, Krzysztof Kozlowski wrote:
> On Tue, Sep 24, 2024 at 11:02:28AM +1200, Chris Packham wrote:
>> Add dtschema for the I2C controller on the RTL9300 SoC. The I2C
>> controllers on this SoC are part of the "switch" block which is
>> represented here as a syscon node. The SCL pins are dependent on the I2C
>> controller (GPIO8 for the first controller, GPIO 17 for the second). The
>> SDA pins can be assigned to either one of the I2C controllers (but not
>> both).
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> ---
>>
>> Notes:
>>      Changes in v3:
>>      - Remove parent node in example
>>      - put unevaluatedProperties after required
>>      - Add #address-cells and #size-cells
>>      
>>      Changes in v2:
>>      - Use reg property for controller registers
>>      - Remove global-control-offset (will be hard coded in driver)
>>      - Integrated the multiplexing function. Child nodes now represent the
>>        available SDA lines
>>
>>   .../bindings/i2c/realtek,rtl9300-i2c.yaml     | 80 +++++++++++++++++++
>>   MAINTAINERS                                   |  6 ++
>>   2 files changed, 86 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>> new file mode 100644
>> index 000000000000..979ec22e81f1
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>> @@ -0,0 +1,80 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://scanmail.trustwave.com/?c=20988&d=gf7y5rgy9ER44HZptkkovLbVGtkYd7ByAz3K6PNPAw&u=http%3a%2f%2fdevicetree%2eorg%2fschemas%2fi2c%2frealtek%2crtl9300-i2c%2eyaml%23
>> +$schema: http://scanmail.trustwave.com/?c=20988&d=gf7y5rgy9ER44HZptkkovLbVGtkYd7ByA2-a7KJKBg&u=http%3a%2f%2fdevicetree%2eorg%2fmeta-schemas%2fcore%2eyaml%23
>> +
>> +title: Realtek RTL I2C Controller
>> +
>> +maintainers:
>> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
>> +
>> +description:
>> +  The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which
> This is confusing. It took me some minutes to understand that two I2Cs
> in the example do not match what you wrote here. I got there only because
> of your DTS. Your patchsets - sent separately and describing problem
> incompletely - do not help.
>
> This is the binding for I2C, not for RTL9300 SoC.
>
>> +  if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be
>> +  assigned to either I2C controller.
>> +
>> +properties:
>> +  compatible:
>> +    const: realtek,rtl9300-i2c
>> +
>> +  reg:
>> +    description: Register offset and size this I2C controller.
> Nope, your reboot mode does not have reg. Either fix reboot mode driver
> or this. Preferably reboot mode.

I'm not sure what you mean by this. The syscon-reboot binding doesn't 
require a reg property and I can only find one in-tree dts 
(turris1x.dts) that actually gives it a reg property.

>
> Best regards,
> Krzysztof
>
Chris Packham Sept. 24, 2024, 9:23 p.m. UTC | #3
On 24/09/24 20:50, Krzysztof Kozlowski wrote:
> On Tue, Sep 24, 2024 at 11:02:30AM +1200, Chris Packham wrote:
>> Add the I2C controllers that are part of the RTL9300 SoC.
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> ---
>>
>> Notes:
>>      Changes in v2:
>>      - Use reg property
>>
>>   arch/mips/boot/dts/realtek/rtl930x.dtsi | 18 ++++++++++++++++++
>>   1 file changed, 18 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi
>> index cf1b38b6c353..cc43025cd46c 100644
>> --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi
>> +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi
>> @@ -33,12 +33,30 @@ lx_clk: clock-175mhz {
>>   	switch0: switch@1b000000 {
>>   		compatible = "realtek,rtl9302c-switch", "syscon", "simple-mfd";
>>   		reg = <0x1b000000 0x10000>;
>> +		#address-cells = <1>;
>> +		#size-cells = <1>;
>>   
>>   		reboot {
>>   			compatible = "syscon-reboot";
>>   			offset = <0x0c>;
>>   			value = <0x01>;
>>   		};
>> +
>> +		i2c0: i2c@36c {
>> +			compatible = "realtek,rtl9300-i2c";
>> +			reg = <0x36c 0x14>;
>> +			status = "disabled";
>> +			#address-cells = <1>;
>> +			#size-cells = <0>;
>> +		};
> This should be sent as one series... You have dependency otherwise. Also
> this points to issue of mixing nodes with and without unit address.
>
> I think i2c children should be under some sort of "i2c" bus node.

something like this?

switch@1b000000 {
    i2c-controller {
      i2c-mst1 {
          status = "okay";
          i2c@0 {
             reg = <0>;
             gpio@20 {
                 reg = <0x20>;
             };
          };
          i2c@2 {
             reg = <2>;
             gpio@20 {
                 reg = <0x20>;
             };
          };
      };
      i2c-mst2 {
          status = "disabled";
      };
   };
};

> Please propose entire realtek,rtl9302c-switch binding with the I2C. It's
> very confusing to see it partial.
Yep will combine these series.
>
>
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Sept. 25, 2024, 7:19 a.m. UTC | #4
On 24/09/2024 23:11, Chris Packham wrote:
> 
> On 24/09/24 20:55, Krzysztof Kozlowski wrote:
>> On Tue, Sep 24, 2024 at 11:02:28AM +1200, Chris Packham wrote:
>>> Add dtschema for the I2C controller on the RTL9300 SoC. The I2C
>>> controllers on this SoC are part of the "switch" block which is
>>> represented here as a syscon node. The SCL pins are dependent on the I2C
>>> controller (GPIO8 for the first controller, GPIO 17 for the second). The
>>> SDA pins can be assigned to either one of the I2C controllers (but not
>>> both).
>>>
>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>> ---
>>>
>>> Notes:
>>>      Changes in v3:
>>>      - Remove parent node in example
>>>      - put unevaluatedProperties after required
>>>      - Add #address-cells and #size-cells
>>>      
>>>      Changes in v2:
>>>      - Use reg property for controller registers
>>>      - Remove global-control-offset (will be hard coded in driver)
>>>      - Integrated the multiplexing function. Child nodes now represent the
>>>        available SDA lines
>>>
>>>   .../bindings/i2c/realtek,rtl9300-i2c.yaml     | 80 +++++++++++++++++++
>>>   MAINTAINERS                                   |  6 ++
>>>   2 files changed, 86 insertions(+)
>>>   create mode 100644 Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>>> new file mode 100644
>>> index 000000000000..979ec22e81f1
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/i2c/realtek,rtl9300-i2c.yaml
>>> @@ -0,0 +1,80 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://scanmail.trustwave.com/?c=20988&d=gf7y5rgy9ER44HZptkkovLbVGtkYd7ByAz3K6PNPAw&u=http%3a%2f%2fdevicetree%2eorg%2fschemas%2fi2c%2frealtek%2crtl9300-i2c%2eyaml%23
>>> +$schema: http://scanmail.trustwave.com/?c=20988&d=gf7y5rgy9ER44HZptkkovLbVGtkYd7ByA2-a7KJKBg&u=http%3a%2f%2fdevicetree%2eorg%2fmeta-schemas%2fcore%2eyaml%23
>>> +
>>> +title: Realtek RTL I2C Controller
>>> +
>>> +maintainers:
>>> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
>>> +
>>> +description:
>>> +  The RTL9300 SoC has two I2C controllers. Each of these has an SCL line (which
>> This is confusing. It took me some minutes to understand that two I2Cs
>> in the example do not match what you wrote here. I got there only because
>> of your DTS. Your patchsets - sent separately and describing problem
>> incompletely - do not help.
>>
>> This is the binding for I2C, not for RTL9300 SoC.
>>
>>> +  if not-used for SCL can be a GPIO). There are 8 common SDA lines that can be
>>> +  assigned to either I2C controller.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: realtek,rtl9300-i2c
>>> +
>>> +  reg:
>>> +    description: Register offset and size this I2C controller.
>> Nope, your reboot mode does not have reg. Either fix reboot mode driver
>> or this. Preferably reboot mode.
> 
> I'm not sure what you mean by this. The syscon-reboot binding doesn't 
> require a reg property and I can only find one in-tree dts 
> (turris1x.dts) that actually gives it a reg property.

But it could. It uses offset instead of reg for historical reasons, when
it was outside of syscon node. I propose to add there reg and oneOf
requiring either reg or offset. This way you will have only MMIO children.

Best regards,
Krzysztof