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[0/5] Initial preparations for MT6765

Message ID 20240729073428.28983-1-me@adomerle.xyz
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Series Initial preparations for MT6765 | expand

Message

Arseniy Velikanov July 29, 2024, 7:34 a.m. UTC 
Hi!

This is first series of patches that fixes MT6765 upstream drivers
(mainly PWRAP), just a preparation for sending the rest
of the patches (there were too many of them, so I splitted them
into several series). More patches can be found here[1].

The pinctrl patch (virtual gpios) can be confusing.
I did the same thing as on MT6735 (see[2]), these are
EINT-only pins that are not linked to any, so "virtual"
ones were added.

Also, there were no MT6765 pinctrl bindings in the upstream,
so I decided to attach them to this series of patches too.

Thanks, Arseniy.

[1] https://github.com/adomerle/linux-mt6765/tree/mt6765-next
[2] https://gitlab.com/mt6735-mainline/linux/-/commit/c4b988b2bea231e9175fd1d78f7602de1931e4d0

Arseniy Velikanov (5):
  dt-bindings: clock: mt6765: Add missing PMIC clock
  clk: mediatek: mt6765: Add missing PMIC clock
  pinctrl: mediatek: mt6765: Add virtual GPIOs
  dt-bindings: pinctrl: mediatek: Add bindings for MT6765 pin controller
  soc: mediatek: mtk-pmic-wrap: Drop CAP reset in MT6765

 drivers/clk/mediatek/clk-mt6765.c             |    1 +
 drivers/pinctrl/mediatek/pinctrl-mtk-mt6765.h |   66 ++
 drivers/soc/mediatek/mtk-pmic-wrap.c          |    2 +-
 include/dt-bindings/clock/mt6765-clk.h        |  131 +--
 .../pinctrl/mediatek,mt6765-pinfunc.h         | 1025 +++++++++++++++++
 5 files changed, 1159 insertions(+), 66 deletions(-)
 create mode 100644 include/dt-bindings/pinctrl/mediatek,mt6765-pinfunc.h

Comments

AngeloGioacchino Del Regno July 29, 2024, 7:46 a.m. UTC | #1 
Il 29/07/24 09:34, Arseniy Velikanov ha scritto:
> Add PWRAP gate
> 
> Fixes: 1aca9939bf72 ("clk: mediatek: Add MT6765 clock support")
> Signed-off-by: Arseniy Velikanov <me@adomerle.xyz>

Agreed, but please remove the fixes tag and add a better commit description.
Something like...

Add the missing PWRAP gate clock, used for communicating with the PMIC through
the PMIC Wrapper hardware.

Cheers,
Angelo

> ---
>   drivers/clk/mediatek/clk-mt6765.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/mediatek/clk-mt6765.c b/drivers/clk/mediatek/clk-mt6765.c
> index d53731e7933f..4f03a0df4ff0 100644
> --- a/drivers/clk/mediatek/clk-mt6765.c
> +++ b/drivers/clk/mediatek/clk-mt6765.c
> @@ -559,6 +559,7 @@ static const struct mtk_gate ifr_clks[] = {
>   	/* INFRA_TOPAXI */
>   	/* INFRA PERI */
>   	/* INFRA mode 0 */
> +	GATE_IFR2(CLK_IFR_PMIC_AP, "ifr_pmic_ap", "axi_ck", 1),
>   	GATE_IFR2(CLK_IFR_ICUSB, "ifr_icusb", "axi_ck", 8),
>   	GATE_IFR2(CLK_IFR_GCE, "ifr_gce", "axi_ck", 9),
>   	GATE_IFR2(CLK_IFR_THERM, "ifr_therm", "axi_ck", 10),