diff mbox series

[2/2] arm64: dts: qcom: sa8775p: Add TCSR halt register space

Message ID 20240705153252.1571814-2-quic_mojha@quicinc.com
State Superseded
Headers show
Series [1/2] dt-bindings: mfd: qcom,tcsr: Add compatible for sa8775p | expand

Commit Message

Mukesh Ojha July 5, 2024, 3:32 p.m. UTC
Enable download mode for sa8775p which can help collect
ramdump for this SoC.

Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sa8775p.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Krzysztof Kozlowski July 7, 2024, 12:46 p.m. UTC | #1
On 05/07/2024 17:32, Mukesh Ojha wrote:
> Enable download mode for sa8775p which can help collect
> ramdump for this SoC.
> 
> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 23f1b2e5e624..a46d00b1ddda 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -221,6 +221,7 @@ eud_in: endpoint {
>  	firmware {
>  		scm {
>  			compatible = "qcom,scm-sa8775p", "qcom,scm";
> +			qcom,dload-mode = <&tcsr 0x13000>;
>  			memory-region = <&tz_ffi_mem>;
>  		};
>  	};
> @@ -2824,6 +2825,11 @@ tcsr_mutex: hwlock@1f40000 {
>  			#hwlock-cells = <1>;
>  		};
>  
> +		tcsr: syscon@1fc0000 {
> +			compatible = "qcom,sa8775p-tcsr", "syscon";

The file is going away. This change is very confusing.

Please align first with your colleagues instead of sending conflicting
work without any explanation.

Best regards,
Krzysztof
Mukesh Ojha July 8, 2024, 4:08 p.m. UTC | #2
On Sun, Jul 07, 2024 at 02:46:59PM +0200, Krzysztof Kozlowski wrote:
> On 05/07/2024 17:32, Mukesh Ojha wrote:
> > Enable download mode for sa8775p which can help collect
> > ramdump for this SoC.
> > 
> > Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 6 ++++++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > index 23f1b2e5e624..a46d00b1ddda 100644
> > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > @@ -221,6 +221,7 @@ eud_in: endpoint {
> >  	firmware {
> >  		scm {
> >  			compatible = "qcom,scm-sa8775p", "qcom,scm";
> > +			qcom,dload-mode = <&tcsr 0x13000>;
> >  			memory-region = <&tz_ffi_mem>;
> >  		};
> >  	};
> > @@ -2824,6 +2825,11 @@ tcsr_mutex: hwlock@1f40000 {
> >  			#hwlock-cells = <1>;
> >  		};
> >  
> > +		tcsr: syscon@1fc0000 {
> > +			compatible = "qcom,sa8775p-tcsr", "syscon";
> 
> The file is going away. This change is very confusing.
> 
> Please align first with your colleagues instead of sending conflicting
> work without any explanation.

Sure, let me check with Tengfei if this can be sent along with his patches.

-Mukesh
Tengfei Fan July 29, 2024, 10:50 a.m. UTC | #3
On 7/9/2024 12:08 AM, Mukesh Ojha wrote:
> On Sun, Jul 07, 2024 at 02:46:59PM +0200, Krzysztof Kozlowski wrote:
>> On 05/07/2024 17:32, Mukesh Ojha wrote:
>>> Enable download mode for sa8775p which can help collect
>>> ramdump for this SoC.
>>>
>>> Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sa8775p.dtsi | 6 ++++++
>>>   1 file changed, 6 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> index 23f1b2e5e624..a46d00b1ddda 100644
>>> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
>>> @@ -221,6 +221,7 @@ eud_in: endpoint {
>>>   	firmware {
>>>   		scm {
>>>   			compatible = "qcom,scm-sa8775p", "qcom,scm";
>>> +			qcom,dload-mode = <&tcsr 0x13000>;
>>>   			memory-region = <&tz_ffi_mem>;
>>>   		};
>>>   	};
>>> @@ -2824,6 +2825,11 @@ tcsr_mutex: hwlock@1f40000 {
>>>   			#hwlock-cells = <1>;
>>>   		};
>>>   
>>> +		tcsr: syscon@1fc0000 {
>>> +			compatible = "qcom,sa8775p-tcsr", "syscon";
>>
>> The file is going away. This change is very confusing.
>>
>> Please align first with your colleagues instead of sending conflicting
>> work without any explanation.
> 
> Sure, let me check with Tengfei if this can be sent along with his patches.
> 
> -Mukesh

After considering the feedback provided on the subject, We have decided
to keep current SA8775p compatible and ABI compatibility in drivers.
Therefore, this patch is still needed, please continue to review this
patch.
Thank you for your input.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 23f1b2e5e624..a46d00b1ddda 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -221,6 +221,7 @@  eud_in: endpoint {
 	firmware {
 		scm {
 			compatible = "qcom,scm-sa8775p", "qcom,scm";
+			qcom,dload-mode = <&tcsr 0x13000>;
 			memory-region = <&tz_ffi_mem>;
 		};
 	};
@@ -2824,6 +2825,11 @@  tcsr_mutex: hwlock@1f40000 {
 			#hwlock-cells = <1>;
 		};
 
+		tcsr: syscon@1fc0000 {
+			compatible = "qcom,sa8775p-tcsr", "syscon";
+			reg = <0x0 0x1fc0000 0x0 0x30000>;
+		};
+
 		gpucc: clock-controller@3d90000 {
 			compatible = "qcom,sa8775p-gpucc";
 			reg = <0x0 0x03d90000 0x0 0xa000>;