| Message ID | 20240507-samsung-usb-phy-fixes-v1-0-4ccba5afa7cc@linaro.org |
|---|---|
| Headers | show |
| Series | a few fixes for the Samsung USB phy driver | expand |
On Tue, 07 May 2024 15:14:43 +0100, André Draszik wrote: > Before coming to an agreement on my Samsung USB31 / gs101 phy changes [1] > [2], I decided to split out those changes from that series which can also be > applied independently and add a few additional fixes I had lying around. > > This contains mostly cleanup, but also a change to using fsleep() as > recommended by the timers-howto, and a fix for setting the ref frequency for > E850. > > [...] Applied, thanks! [1/5] phy: exynos5-usbdrd: uniform order of register bit macros commit: 2a0dc34bab8ede5fa50378ef206f580303eed8de [2/5] phy: exynos5-usbdrd: convert udelay() to fsleep() commit: 27f3d3f6d87f650cc6b3ea08335dea749f1b04aa [3/5] phy: exynos5-usbdrd: make phy_isol() take a bool for clarity commit: f2b6fc4d5c9793c556412e9a8ac122670a0d8dcb [4/5] phy: exynos5-usbdrd: fix definition of EXYNOS5_FSEL_26MHZ commit: 32b2495e731f2a56118034e9c665e6fe56bbfe3a [5/5] phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() commit: d14c14618e851eb25d55807810c2c1791a637712 Best regards,
On Wed, Jun 12, 2024 at 12:51 PM Vinod Koul <vkoul@kernel.org> wrote: > > > On Tue, 07 May 2024 15:14:43 +0100, André Draszik wrote: > > Before coming to an agreement on my Samsung USB31 / gs101 phy changes [1] > > [2], I decided to split out those changes from that series which can also be > > applied independently and add a few additional fixes I had lying around. > > > > This contains mostly cleanup, but also a change to using fsleep() as > > recommended by the timers-howto, and a fix for setting the ref frequency for > > E850. > > > > [...] > > Applied, thanks! > > [1/5] phy: exynos5-usbdrd: uniform order of register bit macros > commit: 2a0dc34bab8ede5fa50378ef206f580303eed8de > [2/5] phy: exynos5-usbdrd: convert udelay() to fsleep() > commit: 27f3d3f6d87f650cc6b3ea08335dea749f1b04aa > [3/5] phy: exynos5-usbdrd: make phy_isol() take a bool for clarity > commit: f2b6fc4d5c9793c556412e9a8ac122670a0d8dcb > [4/5] phy: exynos5-usbdrd: fix definition of EXYNOS5_FSEL_26MHZ > commit: 32b2495e731f2a56118034e9c665e6fe56bbfe3a > [5/5] phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() > commit: d14c14618e851eb25d55807810c2c1791a637712 > Did somebody actually test it on Exynos850? > Best regards, > -- > Vinod Koul <vkoul@kernel.org> >
Before coming to an agreement on my Samsung USB31 / gs101 phy changes [1] [2], I decided to split out those changes from that series which can also be applied independently and add a few additional fixes I had lying around. This contains mostly cleanup, but also a change to using fsleep() as recommended by the timers-howto, and a fix for setting the ref frequency for E850. These should be less controversial. Link: https://lore.kernel.org/r/20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@linaro.org [1] Link: https://lore.kernel.org/r/20240501-usb-phy-gs101-v2-0-ed9f14a1bd6d@linaro.org [2] Signed-off-by: André Draszik <andre.draszik@linaro.org> --- André Draszik (5): phy: exynos5-usbdrd: uniform order of register bit macros phy: exynos5-usbdrd: convert udelay() to fsleep() phy: exynos5-usbdrd: make phy_isol() take a bool for clarity phy: exynos5-usbdrd: fix definition of EXYNOS5_FSEL_26MHZ phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() drivers/phy/samsung/phy-exynos5-usbdrd.c | 95 ++++++++++++++++++-------------- 1 file changed, 55 insertions(+), 40 deletions(-) --- base-commit: 9221b2819b8a4196eecf5476d66201be60fbcf29 change-id: 20240503-samsung-usb-phy-fixes-8b8b6690ffc2 Best regards,