Message ID | be51d1a4-e8fc-48d1-9afb-a42b1d6ca478@freebox.fr |
---|---|
State | Accepted |
Commit | 98a0c4f2278b4d6c1c7722735c20b2247de6293f |
Headers | show |
Series | [v2] arm64: dts: qcom: msm8998: enable adreno_smmu by default | expand |
On Wed, 15 May 2024 16:27:44 +0200, Marc Gonzalez wrote: > 15 qcom platform DTSI files define an adreno_smmu node. > msm8998 is the only one with adreno_smmu disabled by default. > > There's no reason why this SMMU should be disabled by default, > it doesn't need any further configuration. > > Bring msm8998 in line with the 14 other platforms. > > [...] Applied, thanks! [1/1] arm64: dts: qcom: msm8998: enable adreno_smmu by default commit: 98a0c4f2278b4d6c1c7722735c20b2247de6293f Best regards,
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi index 3d3b1f61c0690..edf379c28e1e1 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -1580,7 +1580,6 @@ adreno_smmu: iommu@5040000 { * SoC VDDMX RPM Power Domain in the Adreno driver. */ power-domains = <&gpucc GPU_GX_GDSC>; - status = "disabled"; }; gpucc: clock-controller@5065000 {