| Message ID | 20240425000023.1002026-1-richard.henderson@linaro.org |
|---|---|
| Headers | show |
| Series | target/hppa: Misc improvements | expand |
Cc'ing Helge & Sven as I'm going to skip this series. Suggestion: -- >8 -- diff --git a/MAINTAINERS b/MAINTAINERS index 1b79767d61..be7535b55e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -254,6 +254,8 @@ F: target/hexagon/gen_idef_parser_funcs.py HPPA (PA-RISC) TCG CPUs M: Richard Henderson <richard.henderson@linaro.org> +R: Helge Deller <deller@gmx.de> +R: Sven Schnelle <svens@stackframe.org> S: Maintained F: target/hppa/ F: disas/hppa.c @@ -1214,6 +1216,7 @@ HP-PARISC Machines HP B160L, HP C3700 M: Richard Henderson <richard.henderson@linaro.org> R: Helge Deller <deller@gmx.de> +R: Sven Schnelle <svens@stackframe.org> S: Odd Fixes F: configs/devices/hppa-softmmu/default.mak F: hw/display/artist.c --- On 25/4/24 01:59, Richard Henderson wrote: > Most of the patches lead up to implementing CF_PCREL. > Along the way there is a grab bag of code updates (TCG_COND_TST*), > bug fixes (space changes during branch-in-branch-delay-slot), > and implementation of features (PSW bits B, X, T, H, L). > > Sven reported that PSW L tripped up HP/UX, so possibly there's > something wrong there, but that's right at the end of the patch set. > So I'd like some feedback on the rest leading up to that too. > > > r~ > > > Richard Henderson (45): > target/hppa: Move cpu_get_tb_cpu_state out of line > target/hppa: Use hppa_form_gva_psw in hppa_cpu_get_pc > target/hppa: Move constant destination check into use_goto_tb > target/hppa: Pass displacement to do_dbranch > target/hppa: Allow prior nullification in do_ibranch > target/hppa: Use CF_BP_PAGE instead of cpu_breakpoint_test > target/hppa: Add install_iaq_entries > target/hppa: Add install_link > target/hppa: Delay computation of IAQ_Next > target/hppa: Skip nullified insns in unconditional dbranch path > target/hppa: Simplify TB end > target/hppa: Add IASQ entries to DisasContext > target/hppa: Add space arguments to install_iaq_entries > target/hppa: Add space argument to do_ibranch > target/hppa: Use umax in do_ibranch_priv > target/hppa: Always make a copy in do_ibranch_priv > target/hppa: Introduce and use DisasIAQE for branch management > target/hppa: Use displacements in DisasIAQE > target/hppa: Rename cond_make_* helpers > target/hppa: Use TCG_COND_TST* in do_cond > target/hppa: Use TCG_COND_TST* in do_log_cond > target/hppa: Use TCG_COND_TST* in do_unit_zero_cond > target/hppa: Use TCG_COND_TST* in do_unit_addsub > target/hppa: Use TCG_COND_TST* in trans_bb_imm > target/hppa: Use registerfields.h for FPSR > target/hppa: Use TCG_COND_TST* in trans_ftest > target/hppa: Remove cond_free > target/hppa: Introduce DisasDelayException > target/hppa: Use delay_excp for conditional traps > target/hppa: Use delay_excp for conditional trap on overflow > linux-user/hppa: Force all code addresses to PRIV_USER > target/hppa: Store full iaoq_f and page bits of iaoq_d in TB > target/hppa: Do not mask in copy_iaoq_entry > target/hppa: Improve hppa_cpu_dump_state > target/hppa: Split PSW X and B into their own field > target/hppa: Manage PSW_X and PSW_B in translator > target/hppa: Implement PSW_B > target/hppa: Implement PSW_X > target/hppa: Drop tlb_entry return from hppa_get_physical_address > target/hppa: Adjust priv for B,GATE at runtime > target/hppa: Implement CF_PCREL > target/hppa: Implement PSW_T > target/hppa: Implement PSW_H, PSW_L > target/hppa: Log cpu state at interrupt > target/hppa: Log cpu state on return-from-interrupt > > linux-user/hppa/target_cpu.h | 4 +- > target/hppa/cpu.h | 80 +-- > target/hppa/helper.h | 3 +- > linux-user/elfload.c | 4 +- > linux-user/hppa/cpu_loop.c | 14 +- > linux-user/hppa/signal.c | 6 +- > target/hppa/cpu.c | 92 ++- > target/hppa/fpu_helper.c | 26 +- > target/hppa/gdbstub.c | 6 + > target/hppa/helper.c | 66 +- > target/hppa/int_helper.c | 33 +- > target/hppa/mem_helper.c | 99 +-- > target/hppa/op_helper.c | 17 +- > target/hppa/sys_helper.c | 12 + > target/hppa/translate.c | 1232 ++++++++++++++++++---------------- > 15 files changed, 947 insertions(+), 747 deletions(-) >
Philippe Mathieu-Daudé <philmd@linaro.org> writes: > Cc'ing Helge & Sven as I'm going to skip this series. > > Suggestion: > > -- >8 -- > diff --git a/MAINTAINERS b/MAINTAINERS > index 1b79767d61..be7535b55e 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -254,6 +254,8 @@ F: target/hexagon/gen_idef_parser_funcs.py > > HPPA (PA-RISC) TCG CPUs > M: Richard Henderson <richard.henderson@linaro.org> > +R: Helge Deller <deller@gmx.de> > +R: Sven Schnelle <svens@stackframe.org> > S: Maintained > F: target/hppa/ > F: disas/hppa.c > @@ -1214,6 +1216,7 @@ HP-PARISC Machines > HP B160L, HP C3700 > M: Richard Henderson <richard.henderson@linaro.org> > R: Helge Deller <deller@gmx.de> > +R: Sven Schnelle <svens@stackframe.org> > S: Odd Fixes > F: configs/devices/hppa-softmmu/default.mak > F: hw/display/artist.c Please don't add me as reviewer - i'm only looking in irregular intervals at hppa tcg in qemu.
On 5/12/24 18:08, Sven Schnelle wrote: > Philippe Mathieu-Daudé <philmd@linaro.org> writes: > >> Cc'ing Helge & Sven as I'm going to skip this series. >> >> Suggestion: >> >> -- >8 -- >> diff --git a/MAINTAINERS b/MAINTAINERS >> index 1b79767d61..be7535b55e 100644 >> --- a/MAINTAINERS >> +++ b/MAINTAINERS >> @@ -254,6 +254,8 @@ F: target/hexagon/gen_idef_parser_funcs.py >> >> HPPA (PA-RISC) TCG CPUs >> M: Richard Henderson <richard.henderson@linaro.org> >> +R: Helge Deller <deller@gmx.de> >> +R: Sven Schnelle <svens@stackframe.org> >> S: Maintained >> F: target/hppa/ >> F: disas/hppa.c >> @@ -1214,6 +1216,7 @@ HP-PARISC Machines >> HP B160L, HP C3700 >> M: Richard Henderson <richard.henderson@linaro.org> >> R: Helge Deller <deller@gmx.de> >> +R: Sven Schnelle <svens@stackframe.org> >> S: Odd Fixes >> F: configs/devices/hppa-softmmu/default.mak >> F: hw/display/artist.c > > Please don't add me as reviewer - i'm only looking in irregular > intervals at hppa tcg in qemu. I'm open to be a reviewer for hppa. I already briefly tested and looked into this patch series and hope to finish in the next few days. Sadly it doesn't apply on top of git head any longer... Helge