| Message ID | 20240422123801.2695129-1-rilian.la.te@ya.ru |
|---|---|
| Headers | show |
| Series | add support for EXAR XR20M1172 UART | expand |
On Mon, Apr 22, 2024 at 03:37:54PM +0300, Konstantin Pugin wrote: > From: Konstantin Pugin <ria.freelander@gmail.com> > > EXAR XR20M1172 UART is mostly SC16IS762-compatible, but > it has additional register which can change UART multiplier > to 4x and 8x, similar to UPF_MAGIC_MULTIPLIER does. So, I used this > flag to guard access to its specific DLD register. It seems than > other EXAR SPI UART modules also have this register, but I tested > only XR20M1172. > Yes, in datasheet this register is called "DLD - Divisor Fractional" > or "DLD - Divisor Fractional Register", calling depends on datasheet > version. > > I am sorry about too many submissions and top post reply. About second - > I do not know how to reply properly to this ML from GMail phone app. Isn't it as simple as moving cursor right after the quoted line and replying there? It might require to remove --- cutter at the top manually. > About first - I just get very good feedback from Andy Shevchenko, and want to > fix his review picks ASAP.
On Mon, Apr 22, 2024 at 3:56 PM Andy Shevchenko <andy@kernel.org> wrote: > > On Mon, Apr 22, 2024 at 03:37:55PM +0300, Konstantin Pugin wrote: > > From: Konstantin Pugin <ria.freelander@gmail.com> > > > > The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but > > after the commit 4afeced55baa ("serial: core: fix sanitizing check for > > RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND set and > > always write to the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which > > breaks some hardware using these chips. > > LGTM, but I leave it to Hugo for testing and other comments, if any, > as I don't have a HW. > > Reviewed-by: Andy Shevchenko <andy@kernel.org> > > -- > With Best Regards, > Andy Shevchenko > > Andy, I need to do v7 (because there is a missed fix), but Yandex do not allow me to send more mail( So, can it be sent next day?
Hi, On 22.04.24 15:20, Konstantin P. wrote: > On Mon, Apr 22, 2024 at 3:56 PM Andy Shevchenko <andy@kernel.org> wrote: >> >> On Mon, Apr 22, 2024 at 03:37:55PM +0300, Konstantin Pugin wrote: >>> From: Konstantin Pugin <ria.freelander@gmail.com> >>> >>> The hardware supports both RTS_ON_SEND and RTS_AFTER_SEND modes, but >>> after the commit 4afeced55baa ("serial: core: fix sanitizing check for >>> RTS settings") we always end up with SER_RS485_RTS_AFTER_SEND set and >>> always write to the register field SC16IS7XX_EFCR_RTS_INVERT_BIT, which >>> breaks some hardware using these chips. >> >> LGTM, but I leave it to Hugo for testing and other comments, if any, >> as I don't have a HW. >> >> Reviewed-by: Andy Shevchenko <andy@kernel.org> >> >> -- >> With Best Regards, >> Andy Shevchenko >> >> > > Andy, I need to do v7 (because there is a missed fix), but Yandex do > not allow me to send more mail( So, can it be sent next day? > Please add at least the linux-serial mailing list the next time. As far as I am concerned, I was only aware of this issue because of Andys response which added linux-serial. Furthermore shouldnt this also got to stable? Regards, Lino
From: Konstantin Pugin <ria.freelander@gmail.com> EXAR XR20M1172 UART is mostly SC16IS762-compatible, but it has additional register which can change UART multiplier to 4x and 8x, similar to UPF_MAGIC_MULTIPLIER does. So, I used this flag to guard access to its specific DLD register. It seems than other EXAR SPI UART modules also have this register, but I tested only XR20M1172. Yes, in datasheet this register is called "DLD - Divisor Fractional" or "DLD - Divisor Fractional Register", calling depends on datasheet version. I am sorry about too many submissions and top post reply. About second - I do not know how to reply properly to this ML from GMail phone app. About first - I just get very good feedback from Andy Shevchenko, and want to fix his review picks ASAP. Changes in v2: - use full name in git authorship Changes in v3: - change formatting of commit messages to unify width - rework commit messages according to code review - add XR20M117X namespace for EXAR-specific register - do not use UPF_MAGIC_MULTIPLIER for checking EXAR chip, use s->devtype directly - replace while loop to fls function and expanded check - sort compatibles - reformat multiline comment. Changes in v4: - rebase onto tty-next branch - added Kconfig mention of the chip - used rounddown_power_of_two instead of fls and manual shift - used FIELD_PREP instead of custom macro - removed has_dld bit from common struct, replaced by check function, which checks directly by s->devtype - fixed tab count - properly apply Vladimir Zapolskiy's tag to patch 2 only Changes in v5: - fixes for tty-next branch - address a new code review picks - send properly to all participants - added Ack tag Changes in v6: - KConfig fixes - New code review fixes Konstantin Pugin (3): serial: sc16is7xx: announce support of SER_RS485_RTS_ON_SEND dt-bindings: sc16is7xx: Add compatible line for XR20M1172 UART serial: sc16is7xx: add support for EXAR XR20M1172 UART .../bindings/serial/nxp,sc16is7xx.yaml | 1 + drivers/tty/serial/Kconfig | 3 +- drivers/tty/serial/sc16is7xx.c | 63 +++++++++++++++++-- drivers/tty/serial/sc16is7xx_i2c.c | 1 + drivers/tty/serial/sc16is7xx_spi.c | 1 + 5 files changed, 63 insertions(+), 6 deletions(-) base-commit: f70f95b485d78838ad28dbec804b986d11ad7bb0