| Message ID | 20240308222421.188858-1-jogletre@opensource.cirrus.com |
|---|---|
| Headers | show |
| Series | Add support for CS40L50 | expand |
Hi James, On Fri, Mar 08, 2024 at 10:24:18PM +0000, James Ogletree wrote: > The CS40L50 is a haptic driver with waveform memory, > integrated DSP, and closed-loop algorithms. > > Add a YAML DT binding document for this device. > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com> > --- > .../bindings/input/cirrus,cs40l50.yaml | 70 +++++++++++++++++++ > MAINTAINERS | 8 +++ > 2 files changed, 78 insertions(+) > create mode 100644 Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > > diff --git a/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml b/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > new file mode 100644 > index 000000000000..6a5bdafed56b > --- /dev/null > +++ b/Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > @@ -0,0 +1,70 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/input/cirrus,cs40l50.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Cirrus Logic CS40L50 Advanced Haptic Driver > + > +maintainers: > + - James Ogletree <james.ogletree@cirrus.com> Nit: this email address and the one in MAINTAINERS don't match the one you're using to sign off. There is no requirement that they do; I just wanted to check whether this was intentional. > + > +description: > + CS40L50 is a haptic driver with waveform memory, > + integrated DSP, and closed-loop algorithms. > + > +properties: > + compatible: > + enum: > + - cirrus,cs40l50 > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + reset-gpios: > + maxItems: 1 > + > + va-supply: > + description: Power supply for internal analog circuits. > + > + vp-supply: > + description: Power supply for always-on circuits. > + > + vio-supply: > + description: Power supply for digital input/output. > + > + vamp-supply: > + description: Power supply for the Class D amplifier. Does L50 support external boost mode? If not, it will always be shorted directly to VBST on the board, and there is no reason to describe it in the binding. If external boost mode is supported, then I recommend extending support for it in the driver. Perhaps some additional registers must be set if this supply is present. > + > +required: > + - compatible > + - reg > + - interrupts > + - reset-gpios > + - vp-supply Making VP a required supply is likely inconvenient for customers; 99% of them connect it to a battery, and end up tying this property to a dummy regulator to keep the driver from bleating. Only for a wall-powered case would VP be tied to something like a 3.3-V switching supply, and I imagine those cases are rare. It seems that VP should be optional. > + - vio-supply > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/gpio/gpio.h> > + #include <dt-bindings/interrupt-controller/irq.h> > + > + i2c { > + #address-cells = <1>; > + #size-cells = <0>; Nit: most device trees tend to use 8-column indentation as with kernel code. > + > + haptic-driver@34 { > + compatible = "cirrus,cs40l50"; > + reg = <0x34>; > + interrupt-parent = <&gpio>; > + interrupts = <113 IRQ_TYPE_LEVEL_LOW>; > + reset-gpios = <&gpio 112 GPIO_ACTIVE_LOW>; > + vp-supply = <&vreg>; > + vio-supply = <&vreg>; Showing VP and VIO tied to the same supply is not a valid example; VP typically connects to a battery, and VIO is likely a 1.8-V supply. Their voltage ranges do not overlap, and hence they cannot be shared. I also suspect there are sequencing restrictions between them as well. > + }; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index dd5de540ec0b..b71017a187f8 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4933,6 +4933,14 @@ F: sound/pci/hda/cs* > F: sound/pci/hda/hda_cs_dsp_ctl.* > F: sound/soc/codecs/cs* > > +CIRRUS LOGIC HAPTIC DRIVERS > +M: James Ogletree <james.ogletree@cirrus.com> > +M: Fred Treven <fred.treven@cirrus.com> > +M: Ben Bright <ben.bright@cirrus.com> > +L: patches@opensource.cirrus.com > +S: Supported > +F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > + > CIRRUS LOGIC DSP FIRMWARE DRIVER > M: Simon Trimmer <simont@opensource.cirrus.com> > M: Charles Keepax <ckeepax@opensource.cirrus.com> > -- > 2.25.1 > Kind regards, Jeff LaBundy
Hi James, Again, great work! I think we're almost there; I have just a few trailing comments related to maintainability. On Fri, Mar 08, 2024 at 10:24:19PM +0000, James Ogletree wrote: > Introduce support for Cirrus Logic Device CS40L50: a > haptic driver with waveform memory, integrated DSP, > and closed-loop algorithms. > > The MFD component registers and initializes the device. > > Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com> > --- > MAINTAINERS | 2 + > drivers/mfd/Kconfig | 30 ++ > drivers/mfd/Makefile | 4 + > drivers/mfd/cs40l50-core.c | 528 ++++++++++++++++++++++++++++++++++++ > drivers/mfd/cs40l50-i2c.c | 68 +++++ > drivers/mfd/cs40l50-spi.c | 68 +++++ > include/linux/mfd/cs40l50.h | 144 ++++++++++ > 7 files changed, 844 insertions(+) > create mode 100644 drivers/mfd/cs40l50-core.c > create mode 100644 drivers/mfd/cs40l50-i2c.c > create mode 100644 drivers/mfd/cs40l50-spi.c > create mode 100644 include/linux/mfd/cs40l50.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index b71017a187f8..69a9e0a3b968 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4940,6 +4940,8 @@ M: Ben Bright <ben.bright@cirrus.com> > L: patches@opensource.cirrus.com > S: Supported > F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > +F: drivers/mfd/cs40l* > +F: include/linux/mfd/cs40l* > > CIRRUS LOGIC DSP FIRMWARE DRIVER > M: Simon Trimmer <simont@opensource.cirrus.com> > diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig > index 90ce58fd629e..6273c255f107 100644 > --- a/drivers/mfd/Kconfig > +++ b/drivers/mfd/Kconfig > @@ -2241,6 +2241,36 @@ config MCP_UCB1200_TS > > endmenu > > +config MFD_CS40L50_CORE > + tristate > + select MFD_CORE > + select FW_CS_DSP > + select REGMAP_IRQ > + > +config MFD_CS40L50_I2C > + tristate "Cirrus Logic CS40L50 (I2C)" > + select REGMAP_I2C > + select MFD_CS40L50_CORE > + depends on I2C > + help > + Select this to support the Cirrus Logic CS40L50 Haptic > + Driver over I2C. > + > + This driver can be built as a module. If built as a module it will be > + called "cs40l50-i2c". > + > +config MFD_CS40L50_SPI > + tristate "Cirrus Logic CS40L50 (SPI)" > + select REGMAP_SPI > + select MFD_CS40L50_CORE > + depends on SPI > + help > + Select this to support the Cirrus Logic CS40L50 Haptic > + Driver over SPI. > + > + This driver can be built as a module. If built as a module it will be > + called "cs40l50-spi". > + > config MFD_VEXPRESS_SYSREG > tristate "Versatile Express System Registers" > depends on VEXPRESS_CONFIG && GPIOLIB > diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile > index c66f07edcd0e..a8d18ba155d0 100644 > --- a/drivers/mfd/Makefile > +++ b/drivers/mfd/Makefile > @@ -88,6 +88,10 @@ obj-$(CONFIG_MFD_MADERA) += madera.o > obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o > obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o > > +obj-$(CONFIG_MFD_CS40L50_CORE) += cs40l50-core.o > +obj-$(CONFIG_MFD_CS40L50_I2C) += cs40l50-i2c.o > +obj-$(CONFIG_MFD_CS40L50_SPI) += cs40l50-spi.o > + > obj-$(CONFIG_TPS6105X) += tps6105x.o > obj-$(CONFIG_TPS65010) += tps65010.o > obj-$(CONFIG_TPS6507X) += tps6507x.o > diff --git a/drivers/mfd/cs40l50-core.c b/drivers/mfd/cs40l50-core.c > new file mode 100644 > index 000000000000..92e67f80f36a > --- /dev/null > +++ b/drivers/mfd/cs40l50-core.c > @@ -0,0 +1,528 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * CS40L50 Advanced Haptic Driver with waveform memory, > + * integrated DSP, and closed-loop algorithms > + * > + * Copyright 2024 Cirrus Logic, Inc. > + * > + * Author: James Ogletree <james.ogletree@cirrus.com> > + */ > + > +#include <linux/firmware/cirrus/cs_dsp.h> > +#include <linux/firmware/cirrus/wmfw.h> > +#include <linux/mfd/core.h> > +#include <linux/mfd/cs40l50.h> > +#include <linux/pm_runtime.h> > +#include <linux/regulator/consumer.h> > + > +static const struct mfd_cell cs40l50_devs[] = { > + { .name = "cs40l50-codec", }, > + { .name = "cs40l50-vibra", }, > +}; > + > +const struct regmap_config cs40l50_regmap = { > + .reg_bits = 32, > + .reg_stride = 4, > + .val_bits = 32, > + .reg_format_endian = REGMAP_ENDIAN_BIG, > + .val_format_endian = REGMAP_ENDIAN_BIG, > +}; > +EXPORT_SYMBOL_GPL(cs40l50_regmap); > + > +static const char * const cs40l50_supplies[] = { > + "vp", "vio", > +}; Strictly speaking, the VA supply must be called out in the binding as a required supply; the device cannot function without it. I think you have gotten away without handling VA because VA and VIO are likely tied together on your board. Are there any practical applications where VA and VIO would be split apart on the board? For example, can VIO be tied to a 3.3-V supply in support of 3.3-V logic, while VA remains powered by 1.8 V? If so, the driver needs to provide a means to supply a separate VA regulator, and the binding needs to specify that oneOf them is required. If VA and VIO are recommended to be tied together, then I don't think they need to be defined separately in the binding. We should only ask customers to supply one 1.8-V regulator; perhaps the description can mention how this regulator maps to the VA and VIO pins of the device. For older devices like L25, VA and VIO were shorted inside the package. The same goes for VAMP; it seems the intent here is to support internal boost mode only, with VAMP and VBST shorted on the board. Therefore, I don't see a need to define VAMP in the binding either. If you intend to define VAMP in the binding, then the driver should support external boost mode, otherwise the driver is incomplete. It seems unlikely that customers would use external boost mode for a haptic application; this is probably more common for audio applications that borrow the same die. As I mention in the binding, VP should really be optional in terms of regulator support; it's almost always connected to a battery, and not a regulator. > + > +static const struct regmap_irq cs40l50_reg_irqs[] = { > + REGMAP_IRQ_REG(CS40L50_DSP_QUEUE_IRQ, CS40L50_IRQ1_INT_2_OFFSET, > + CS40L50_DSP_QUEUE_MASK), > + REGMAP_IRQ_REG(CS40L50_AMP_SHORT_IRQ, CS40L50_IRQ1_INT_1_OFFSET, > + CS40L50_AMP_SHORT_MASK), > + REGMAP_IRQ_REG(CS40L50_TEMP_ERR_IRQ, CS40L50_IRQ1_INT_8_OFFSET, > + CS40L50_TEMP_ERR_MASK), > + REGMAP_IRQ_REG(CS40L50_BST_UVP_IRQ, CS40L50_IRQ1_INT_9_OFFSET, > + CS40L50_BST_UVP_MASK), > + REGMAP_IRQ_REG(CS40L50_BST_SHORT_IRQ, CS40L50_IRQ1_INT_9_OFFSET, > + CS40L50_BST_SHORT_MASK), > + REGMAP_IRQ_REG(CS40L50_BST_ILIMIT_IRQ, CS40L50_IRQ1_INT_9_OFFSET, > + CS40L50_BST_ILIMIT_MASK), > + REGMAP_IRQ_REG(CS40L50_UVLO_VDDBATT_IRQ, CS40L50_IRQ1_INT_10_OFFSET, > + CS40L50_UVLO_VDDBATT_MASK), > + REGMAP_IRQ_REG(CS40L50_GLOBAL_ERROR_IRQ, CS40L50_IRQ1_INT_18_OFFSET, > + CS40L50_GLOBAL_ERROR_MASK), > +}; > + > +static struct regmap_irq_chip cs40l50_irq_chip = { > + .name = "cs40l50", > + > + .status_base = CS40L50_IRQ1_INT_1, > + .mask_base = CS40L50_IRQ1_MASK_1, > + .ack_base = CS40L50_IRQ1_INT_1, > + .num_regs = 22, > + > + .irqs = cs40l50_reg_irqs, > + .num_irqs = ARRAY_SIZE(cs40l50_reg_irqs), > + > + .runtime_pm = true, > +}; No need for newlines in here. > + > +int cs40l50_dsp_write(struct device *dev, struct regmap *regmap, u32 val) > +{ > + int err, i; It seems this series uses 'err', 'error' and 'ret' throughout. I know that 'error' is typically requested in the input subsystem, but I see no reason not to stick with 'ret' for the rest of the series. > + u32 ack; > + > + /* Device NAKs if hibernating, so optionally retry */ > + for (i = 0; i < CS40L50_DSP_TIMEOUT_COUNT; i++) { > + err = regmap_write(regmap, CS40L50_DSP_QUEUE, val); > + if (!err) > + break; > + > + usleep_range(CS40L50_DSP_POLL_US, CS40L50_DSP_POLL_US + 100); > + } > + > + /* If write never occurred, don't bother polling for ACK */ > + if (i == CS40L50_DSP_TIMEOUT_COUNT) { > + dev_err(dev, "Timed out writing %#X to DSP: %d\n", val, err); > + return err; > + } > + > + err = regmap_read_poll_timeout(regmap, CS40L50_DSP_QUEUE, ack, !ack, > + CS40L50_DSP_POLL_US, > + CS40L50_DSP_POLL_US * CS40L50_DSP_TIMEOUT_COUNT); > + if (err) > + dev_err(dev, "DSP did not ACK %#X: %d\n", val, err); > + > + return err; > +} > +EXPORT_SYMBOL_GPL(cs40l50_dsp_write); > + > +static const struct cs_dsp_region cs40l50_dsp_regions[] = { > + { .type = WMFW_HALO_PM_PACKED, .base = CS40L50_PMEM_0 }, > + { .type = WMFW_HALO_XM_PACKED, .base = CS40L50_XMEM_PACKED_0 }, > + { .type = WMFW_HALO_YM_PACKED, .base = CS40L50_YMEM_PACKED_0 }, > + { .type = WMFW_ADSP2_XM, .base = CS40L50_XMEM_UNPACKED24_0 }, > + { .type = WMFW_ADSP2_YM, .base = CS40L50_YMEM_UNPACKED24_0 }, > +}; > + > +static const struct reg_sequence cs40l50_internal_vamp_config[] = { > + { CS40L50_BST_LPMODE_SEL, CS40L50_DCM_LOW_POWER }, > + { CS40L50_BLOCK_ENABLES2, CS40L50_OVERTEMP_WARN }, > +}; I recommend against aligning the second values here and below. If another register with a long name is added later, the patch would touch more lines than needed in order to restore the alignment. What you've done for the cs40l50_dsp_regions[] array is safer. > + > +static const struct reg_sequence cs40l50_irq_mask_override[] = { > + { CS40L50_IRQ1_MASK_2, CS40L50_IRQ_MASK_2_OVERRIDE }, > + { CS40L50_IRQ1_MASK_20, CS40L50_IRQ_MASK_20_OVERRIDE }, > +}; > + > +static int cs40l50_configure_dsp(struct cs_dsp *dsp) > +{ > + struct cs40l50 *cs40l50 = container_of(dsp, struct cs40l50, dsp); > + u32 nwaves; > + int err; > + > + /* Log number of effects if wavetable was loaded */ > + if (cs40l50->bin) { Is there any other clue you can use to discern whether a wavetable was loaded? The memory at cs40l50->bin is gone now, and although you're not dereferencing it anymore, another contributor might be fooled into doing so down the road. Maybe a boolean would be more maintainable; I don't feel strongly about it though. > + err = regmap_read(dsp->regmap, CS40L50_NUM_WAVES, &nwaves); > + if (err) > + return err; > + > + dev_info(dsp->dev, "%u effects loaded\n", nwaves); > + } > + > + cs40l50->wseqs[CS40L50_PWR_ON].ctl = cs_dsp_get_ctl(dsp, "PM_PWR_ON_SEQ", > + WMFW_ADSP2_XM, > + CS40L50_PM_ALGO); > + if (!cs40l50->wseqs[CS40L50_PWR_ON].ctl) { > + dev_err(dsp->dev, "No control for power-on write sequence\n"); > + return -ENOENT; > + } > + > + /* Initialize the power-on write sequencer */ > + err = cs_dsp_wseq_init(dsp, cs40l50->wseqs, 1); > + if (err) { > + dev_err(dsp->dev, "Failed to initialize power-on write sequence\n"); > + return err; > + } > + > + /* Configure internal V_AMP supply */ > + err = regmap_multi_reg_write(dsp->regmap, cs40l50_internal_vamp_config, > + ARRAY_SIZE(cs40l50_internal_vamp_config)); > + if (err) > + return err; > + > + err = cs_dsp_wseq_multi_write(dsp, &cs40l50->wseqs[CS40L50_PWR_ON], > + cs40l50_internal_vamp_config, CS_DSP_WSEQ_FULL, > + ARRAY_SIZE(cs40l50_internal_vamp_config), false); > + if (err) > + return err; > + > + /* Override firmware defaults for IRQ masks */ > + err = regmap_multi_reg_write(dsp->regmap, cs40l50_irq_mask_override, > + ARRAY_SIZE(cs40l50_irq_mask_override)); > + if (err) > + return err; > + > + err = cs_dsp_wseq_multi_write(dsp, &cs40l50->wseqs[CS40L50_PWR_ON], > + cs40l50_irq_mask_override, CS_DSP_WSEQ_FULL, > + ARRAY_SIZE(cs40l50_irq_mask_override), false); > + if (err) > + return err; > + > + /* Add child devices now that DSP is running */ > + err = devm_mfd_add_devices(dsp->dev, PLATFORM_DEVID_NONE, cs40l50_devs, > + ARRAY_SIZE(cs40l50_devs), NULL, 0, NULL); > + if (err) > + dev_err(dsp->dev, "Failed to add child devices: %d\n", err); > + > + return err; > +} > + > +static const struct cs_dsp_client_ops client_ops = { > + .post_run = cs40l50_configure_dsp, > +}; > + > +static void cs40l50_dsp_remove(void *data) > +{ > + cs_dsp_remove(data); > +} > + > +static int cs40l50_dsp_init(struct cs40l50 *cs40l50) > +{ > + int err; > + > + cs40l50->dsp.num = 1; > + cs40l50->dsp.type = WMFW_HALO; > + cs40l50->dsp.dev = cs40l50->dev; > + cs40l50->dsp.regmap = cs40l50->regmap; > + cs40l50->dsp.base = CS40L50_CORE_BASE; > + cs40l50->dsp.base_sysinfo = CS40L50_SYS_INFO_ID; > + cs40l50->dsp.mem = cs40l50_dsp_regions; > + cs40l50->dsp.num_mems = ARRAY_SIZE(cs40l50_dsp_regions); > + cs40l50->dsp.no_core_startstop = true; > + cs40l50->dsp.client_ops = &client_ops; > + > + err = cs_dsp_halo_init(&cs40l50->dsp); > + if (err) > + return err; > + > + return devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_remove, > + &cs40l50->dsp); > +} > + > +static void cs40l50_dsp_power_down(void *data) > +{ > + cs_dsp_power_down(data); > +} > + > +static void cs40l50_dsp_stop(void *data) > +{ > + cs_dsp_stop(data); > +} > + > +static void cs40l50_start_dsp(const struct firmware *bin, void *context) > +{ > + struct cs40l50 *cs40l50 = context; > + int err; > + > + /* Wavetable is optional; start DSP regardless */ > + cs40l50->bin = bin; > + > + mutex_lock(&cs40l50->lock); It seems the mutex is used only to prevent interrupt handling while the DSP is being configured; can't we just call disable_irq() and enable_irq() here? > + > + err = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_SHUTDOWN); > + if (err) > + goto err_mutex; > + > + err = cs_dsp_power_up(&cs40l50->dsp, cs40l50->fw, "cs40l50.wmfw", > + cs40l50->bin, "cs40l50.bin", "cs40l50"); > + if (err) > + goto err_mutex; > + > + err = devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_power_down, > + &cs40l50->dsp); > + if (err) > + goto err_mutex; > + > + err = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_SYSTEM_RESET); > + if (err) > + goto err_mutex; > + > + err = cs40l50_dsp_write(cs40l50->dev, cs40l50->regmap, CS40L50_PREVENT_HIBER); > + if (err) > + goto err_mutex; > + > + err = cs_dsp_run(&cs40l50->dsp); > + if (err) > + goto err_mutex; > + > + err = devm_add_action_or_reset(cs40l50->dev, cs40l50_dsp_stop, &cs40l50->dsp); In the case of L25, it was common to stop and re-start the DSP for either of the following reasons: 1. Swap out .wmfw files. Eventually, different algorithms got so large that different .wmfw files were needed for different use-cases (e.g. A2H vs. f0 tracking). No matter how much RAM gets added to the HALO core, there is never enough! :) 2. Respond to spurious reset. With one customer in particular, the reset GPIO traveled over a flex cable, and the connector suffered some contact bounce during drop testing. In general, things that should be able to be executed an infinite number of times (e.g. register writes) should be logically separate from things that should only be executed once, like a call to devm_add_action_or_reset(). The same is true for cs40l50_configure_dsp(); it contains a mix of register writes, but then a call to devm_mfd_add_devices(). Please consider separating some of these tasks so that rip-up is minimal in case you need to restore or reconfigure the device on-the-fly at a later time. > +err_mutex: > + mutex_unlock(&cs40l50->lock); > + release_firmware(cs40l50->bin); > + release_firmware(cs40l50->fw); > + > + if (err) > + dev_err(cs40l50->dev, "Failed to start DSP: %d", err); The fact that we have so much clean-up in the error path may suggest that the bulk of this function belongs in a helper, e.g. __cs40l50_start_dsp(), with return type of int. > +} > + > +static void cs40l50_request_firmware(const struct firmware *fw, void *context) > +{ > + struct cs40l50 *cs40l50 = context; > + > + if (!fw) { > + dev_err(cs40l50->dev, "No firmware file found\n"); > + return; > + } > + > + cs40l50->fw = fw; > + > + if (request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, CS40L50_WT, > + cs40l50->dev, GFP_KERNEL, cs40l50, > + cs40l50_start_dsp)) { > + dev_err(cs40l50->dev, "Failed to request %s\n", CS40L50_WT); Please record the return value of request_firmware_nowait() and print it in the error message. It makes it much easier for Luddites such as myself to debug ;) > + release_firmware(cs40l50->fw); > + } > +} > + > +struct cs40l50_irq { > + const char *name; > + int virq; > +}; > + > +static struct cs40l50_irq cs40l50_irqs[] = { > + { "DSP", }, > + { "Global", }, > + { "Boost UVLO", }, > + { "Boost current limit", }, > + { "Boost short", }, > + { "Boost undervolt", }, > + { "Overtemp", }, > + { "Amp short", }, > +}; > + > +static const struct reg_sequence cs40l50_err_rls[] = { > + { CS40L50_ERR_RLS, CS40L50_GLOBAL_ERR_RLS_SET }, > + { CS40L50_ERR_RLS, CS40L50_GLOBAL_ERR_RLS_CLEAR }, > +}; > + > +static irqreturn_t cs40l50_hw_err(int irq, void *data) > +{ > + struct cs40l50 *cs40l50 = data; > + int err = 0, i; > + > + mutex_lock(&cs40l50->lock); > + > + /* Log hardware interrupt and execute error release sequence */ > + for (i = 1; i < ARRAY_SIZE(cs40l50_irqs); i++) { > + if (cs40l50_irqs[i].virq == irq) { > + dev_err(cs40l50->dev, "%s error\n", cs40l50_irqs[i].name); > + err = regmap_multi_reg_write(cs40l50->regmap, cs40l50_err_rls, > + ARRAY_SIZE(cs40l50_err_rls)); > + goto exit; There is no need for a goto label here; just break. > + } > + } > +exit: > + mutex_unlock(&cs40l50->lock); > + return IRQ_RETVAL(!err); > +} > + > +static irqreturn_t cs40l50_dsp_queue(int irq, void *data) > +{ > + struct cs40l50 *cs40l50 = data; > + u32 rd_ptr, val, wt_ptr; > + int err = 0; > + > + mutex_lock(&cs40l50->lock); > + > + /* Read from DSP queue, log, and update read pointer */ > + while (!err) { > + err = regmap_read(cs40l50->regmap, CS40L50_DSP_QUEUE_WT, &wt_ptr); > + if (err) > + goto exit; Same here, and throughout; just break out of the loop. > + > + err = regmap_read(cs40l50->regmap, CS40L50_DSP_QUEUE_RD, &rd_ptr); > + if (err) > + goto exit; > + > + /* Check if queue is empty */ > + if (wt_ptr == rd_ptr) > + goto exit; > + > + err = regmap_read(cs40l50->regmap, rd_ptr, &val); > + if (err) > + goto exit; > + > + dev_dbg(cs40l50->dev, "DSP payload: %#X", val); > + > + rd_ptr += sizeof(u32); > + > + if (rd_ptr > CS40L50_DSP_QUEUE_END) > + rd_ptr = CS40L50_DSP_QUEUE_BASE; > + > + err = regmap_write(cs40l50->regmap, CS40L50_DSP_QUEUE_RD, rd_ptr); > + if (err) > + goto exit; > + } > +exit: > + mutex_unlock(&cs40l50->lock); > + > + return IRQ_RETVAL(!err); > +} > + > +static int cs40l50_irq_init(struct cs40l50 *cs40l50) > +{ > + struct device *dev = cs40l50->dev; > + int err, i, virq; > + > + err = devm_regmap_add_irq_chip(dev, cs40l50->regmap, cs40l50->irq, > + IRQF_ONESHOT | IRQF_SHARED, 0, > + &cs40l50_irq_chip, &cs40l50->irq_data); > + if (err) { > + dev_err(dev, "Failed adding IRQ chip\n"); I don't see any need for individual prints in this function, since the call to cs40l50_irq_init() is already followed by a call to dev_err_probe(). > + return err; > + } > + > + for (i = 0; i < ARRAY_SIZE(cs40l50_irqs); i++) { > + virq = regmap_irq_get_virq(cs40l50->irq_data, i); > + if (virq < 0) { > + dev_err(dev, "Failed getting %s\n", cs40l50_irqs[i].name); > + return virq; > + } > + > + cs40l50_irqs[i].virq = virq; > + > + /* Handle DSP and hardware interrupts separately */ > + err = devm_request_threaded_irq(dev, virq, NULL, > + i ? cs40l50_hw_err : cs40l50_dsp_queue, > + IRQF_ONESHOT | IRQF_SHARED, > + cs40l50_irqs[i].name, cs40l50); > + if (err) { > + dev_err(dev, "Failed requesting %s IRQ\n", > + cs40l50_irqs[i].name); > + return err; > + } > + } > + > + return 0; > +} > + > +static int cs40l50_get_model(struct cs40l50 *cs40l50) > +{ > + int err; > + > + err = regmap_read(cs40l50->regmap, CS40L50_DEVID, &cs40l50->devid); > + if (err) > + return err; > + > + if (cs40l50->devid != CS40L50_DEVID_A) > + return -EINVAL; > + > + err = regmap_read(cs40l50->regmap, CS40L50_REVID, &cs40l50->revid); > + if (err) > + return err; > + > + if (cs40l50->revid < CS40L50_REVID_B0) > + return -EINVAL; > + > + dev_info(cs40l50->dev, "Cirrus Logic CS40L50 rev. %02X\n", cs40l50->revid); This should be dev_dbg(). > + > + return 0; > +} > + > +static int cs40l50_pm_runtime_setup(struct device *dev) > +{ > + int err; > + > + pm_runtime_set_autosuspend_delay(dev, CS40L50_AUTOSUSPEND_MS); > + pm_runtime_use_autosuspend(dev); > + pm_runtime_get_noresume(dev); > + err = pm_runtime_set_active(dev); > + if (err) > + return err; > + > + return devm_pm_runtime_enable(dev); > +} > + > +int cs40l50_probe(struct cs40l50 *cs40l50) > +{ > + struct device *dev = cs40l50->dev; > + int err; > + > + mutex_init(&cs40l50->lock); > + > + cs40l50->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(cs40l50->reset_gpio)) > + return dev_err_probe(dev, PTR_ERR(cs40l50->reset_gpio), > + "Failed getting reset GPIO\n"); > + > + err = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(cs40l50_supplies), > + cs40l50_supplies); > + if (err) > + return dev_err_probe(dev, err, "Failed getting supplies\n"); > + > + /* Ensure minimum reset pulse width */ > + usleep_range(CS40L50_RESET_PULSE_US, CS40L50_RESET_PULSE_US + 100); > + > + gpiod_set_value_cansleep(cs40l50->reset_gpio, 0); > + > + /* Wait for control port to be ready */ > + usleep_range(CS40L50_CP_READY_US, CS40L50_CP_READY_US + 100); > + > + err = cs40l50_dsp_init(cs40l50); > + if (err) > + return dev_err_probe(dev, err, "Failed to initialize DSP\n"); > + > + err = cs40l50_pm_runtime_setup(dev); > + if (err) > + return dev_err_probe(dev, err, "Failed to initialize runtime PM\n"); > + > + err = cs40l50_get_model(cs40l50); > + if (err) > + return dev_err_probe(dev, err, "Failed to get part number\n"); I think cs40l50_get_model() should be called directly after usleep_range() is called; there is no use in doing any other initialization if we can't talk I2C or SPI, or the model is invalid. > + > + err = cs40l50_irq_init(cs40l50); > + if (err) > + return dev_err_probe(dev, err, "Failed to request IRQs\n"); > + > + err = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, CS40L50_FW, > + dev, GFP_KERNEL, cs40l50, cs40l50_request_firmware); > + if (err) > + return dev_err_probe(dev, err, "Failed to request %s\n", CS40L50_FW); > + > + pm_runtime_mark_last_busy(dev); > + pm_runtime_put_autosuspend(dev); > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(cs40l50_probe); > + > +int cs40l50_remove(struct cs40l50 *cs40l50) > +{ > + gpiod_set_value_cansleep(cs40l50->reset_gpio, 1); > + > + return 0; > +} > +EXPORT_SYMBOL_GPL(cs40l50_remove); > + > +static int cs40l50_runtime_suspend(struct device *dev) > +{ > + struct cs40l50 *cs40l50 = dev_get_drvdata(dev); > + > + return regmap_write(cs40l50->regmap, CS40L50_DSP_QUEUE, CS40L50_ALLOW_HIBER); > +} > + > +static int cs40l50_runtime_resume(struct device *dev) > +{ > + struct cs40l50 *cs40l50 = dev_get_drvdata(dev); > + > + return cs40l50_dsp_write(dev, cs40l50->regmap, CS40L50_PREVENT_HIBER); > +} > + > +EXPORT_GPL_DEV_PM_OPS(cs40l50_pm_ops) = { > + RUNTIME_PM_OPS(cs40l50_runtime_suspend, cs40l50_runtime_resume, NULL) > +}; > + > +MODULE_DESCRIPTION("CS40L50 Advanced Haptic Driver"); > +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. <james.ogletree@cirrus.com>"); > +MODULE_LICENSE("GPL"); > +MODULE_IMPORT_NS(FW_CS_DSP); > diff --git a/drivers/mfd/cs40l50-i2c.c b/drivers/mfd/cs40l50-i2c.c > new file mode 100644 > index 000000000000..639be743d956 > --- /dev/null > +++ b/drivers/mfd/cs40l50-i2c.c > @@ -0,0 +1,68 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * CS40L50 Advanced Haptic Driver with waveform memory, > + * integrated DSP, and closed-loop algorithms > + * > + * Copyright 2024 Cirrus Logic, Inc. > + * > + * Author: James Ogletree <james.ogletree@cirrus.com> > + */ > + > +#include <linux/i2c.h> > +#include <linux/mfd/cs40l50.h> > + > +static int cs40l50_i2c_probe(struct i2c_client *i2c) > +{ > + struct cs40l50 *cs40l50; > + > + cs40l50 = devm_kzalloc(&i2c->dev, sizeof(*cs40l50), GFP_KERNEL); > + if (!cs40l50) > + return -ENOMEM; > + > + i2c_set_clientdata(i2c, cs40l50); > + > + cs40l50->dev = &i2c->dev; > + cs40l50->irq = i2c->irq; > + > + cs40l50->regmap = devm_regmap_init_i2c(i2c, &cs40l50_regmap); > + if (IS_ERR(cs40l50->regmap)) > + return dev_err_probe(cs40l50->dev, PTR_ERR(cs40l50->regmap), > + "Failed to initialize register map\n"); > + > + return cs40l50_probe(cs40l50); > +} > + > +static void cs40l50_i2c_remove(struct i2c_client *i2c) > +{ > + struct cs40l50 *cs40l50 = i2c_get_clientdata(i2c); > + > + cs40l50_remove(cs40l50); > +} > + > +static const struct i2c_device_id cs40l50_id_i2c[] = { > + { "cs40l50" }, > + {} > +}; > +MODULE_DEVICE_TABLE(i2c, cs40l50_id_i2c); > + > +static const struct of_device_id cs40l50_of_match[] = { > + { .compatible = "cirrus,cs40l50" }, > + {} > +}; > +MODULE_DEVICE_TABLE(of, cs40l50_of_match); > + > +static struct i2c_driver cs40l50_i2c_driver = { > + .driver = { > + .name = "cs40l50", > + .of_match_table = cs40l50_of_match, > + .pm = pm_ptr(&cs40l50_pm_ops), > + }, > + .id_table = cs40l50_id_i2c, > + .probe = cs40l50_i2c_probe, > + .remove = cs40l50_i2c_remove, > +}; > +module_i2c_driver(cs40l50_i2c_driver); > + > +MODULE_DESCRIPTION("CS40L50 I2C Driver"); > +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. <james.ogletree@cirrus.com>"); > +MODULE_LICENSE("GPL"); > diff --git a/drivers/mfd/cs40l50-spi.c b/drivers/mfd/cs40l50-spi.c > new file mode 100644 > index 000000000000..53526b595a0d > --- /dev/null > +++ b/drivers/mfd/cs40l50-spi.c > @@ -0,0 +1,68 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * CS40L50 Advanced Haptic Driver with waveform memory, > + * integrated DSP, and closed-loop algorithms > + * > + * Copyright 2024 Cirrus Logic, Inc. > + * > + * Author: James Ogletree <james.ogletree@cirrus.com> > + */ > + > +#include <linux/mfd/cs40l50.h> > +#include <linux/spi/spi.h> > + > +static int cs40l50_spi_probe(struct spi_device *spi) > +{ > + struct cs40l50 *cs40l50; > + > + cs40l50 = devm_kzalloc(&spi->dev, sizeof(*cs40l50), GFP_KERNEL); > + if (!cs40l50) > + return -ENOMEM; > + > + spi_set_drvdata(spi, cs40l50); > + > + cs40l50->dev = &spi->dev; > + cs40l50->irq = spi->irq; > + > + cs40l50->regmap = devm_regmap_init_spi(spi, &cs40l50_regmap); > + if (IS_ERR(cs40l50->regmap)) > + return dev_err_probe(cs40l50->dev, PTR_ERR(cs40l50->regmap), > + "Failed to initialize register map\n"); > + > + return cs40l50_probe(cs40l50); > +} > + > +static void cs40l50_spi_remove(struct spi_device *spi) > +{ > + struct cs40l50 *cs40l50 = spi_get_drvdata(spi); > + > + cs40l50_remove(cs40l50); > +} > + > +static const struct spi_device_id cs40l50_id_spi[] = { > + { "cs40l50" }, > + {} > +}; > +MODULE_DEVICE_TABLE(spi, cs40l50_id_spi); > + > +static const struct of_device_id cs40l50_of_match[] = { > + { .compatible = "cirrus,cs40l50" }, > + {} > +}; > +MODULE_DEVICE_TABLE(of, cs40l50_of_match); > + > +static struct spi_driver cs40l50_spi_driver = { > + .driver = { > + .name = "cs40l50", > + .of_match_table = cs40l50_of_match, > + .pm = pm_ptr(&cs40l50_pm_ops), > + }, > + .id_table = cs40l50_id_spi, > + .probe = cs40l50_spi_probe, > + .remove = cs40l50_spi_remove, > +}; > +module_spi_driver(cs40l50_spi_driver); > + > +MODULE_DESCRIPTION("CS40L50 SPI Driver"); > +MODULE_AUTHOR("James Ogletree, Cirrus Logic Inc. <james.ogletree@cirrus.com>"); > +MODULE_LICENSE("GPL"); > diff --git a/include/linux/mfd/cs40l50.h b/include/linux/mfd/cs40l50.h > new file mode 100644 > index 000000000000..cc0661926918 > --- /dev/null > +++ b/include/linux/mfd/cs40l50.h > @@ -0,0 +1,144 @@ > +/* SPDX-License-Identifier: GPL-2.0 > + * > + * CS40L50 Advanced Haptic Driver with waveform memory, > + * integrated DSP, and closed-loop algorithms > + * > + * Copyright 2024 Cirrus Logic, Inc. > + * > + * Author: James Ogletree <james.ogletree@cirrus.com> > + */ > + > +#ifndef __MFD_CS40L50_H__ > +#define __MFD_CS40L50_H__ > + > +#include <linux/firmware/cirrus/cs_dsp.h> > +#include <linux/gpio/consumer.h> > +#include <linux/pm.h> > +#include <linux/regmap.h> > + > +/* Power Supply Configuration */ > +#define CS40L50_BLOCK_ENABLES2 0x201C > +#define CS40L50_ERR_RLS 0x2034 > +#define CS40L50_PWRMGT_CTL 0x2900 > +#define CS40L50_BST_LPMODE_SEL 0x3810 > +#define CS40L50_DCM_LOW_POWER 0x1 > +#define CS40L50_OVERTEMP_WARN 0x4000010 > + > +/* Interrupts */ > +#define CS40L50_IRQ1_INT_1 0xE010 > +#define CS40L50_IRQ1_BASE CS40L50_IRQ1_INT_1 > +#define CS40L50_IRQ1_INT_2 0xE014 > +#define CS40L50_IRQ1_INT_8 0xE02C > +#define CS40L50_IRQ1_INT_9 0xE030 > +#define CS40L50_IRQ1_INT_10 0xE034 > +#define CS40L50_IRQ1_INT_18 0xE054 > +#define CS40L50_IRQ1_MASK_1 0xE090 > +#define CS40L50_IRQ1_MASK_2 0xE094 > +#define CS40L50_IRQ1_MASK_20 0xE0DC > +#define CS40L50_IRQ1_INT_1_OFFSET (CS40L50_IRQ1_INT_1 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ1_INT_2_OFFSET (CS40L50_IRQ1_INT_2 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ1_INT_8_OFFSET (CS40L50_IRQ1_INT_8 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ1_INT_9_OFFSET (CS40L50_IRQ1_INT_9 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ1_INT_10_OFFSET (CS40L50_IRQ1_INT_10 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ1_INT_18_OFFSET (CS40L50_IRQ1_INT_18 - CS40L50_IRQ1_BASE) > +#define CS40L50_IRQ_MASK_2_OVERRIDE 0xFFDF7FFF > +#define CS40L50_IRQ_MASK_20_OVERRIDE 0x15C01000 > +#define CS40L50_AMP_SHORT_MASK BIT(31) > +#define CS40L50_DSP_QUEUE_MASK BIT(21) > +#define CS40L50_TEMP_ERR_MASK BIT(31) > +#define CS40L50_BST_UVP_MASK BIT(6) > +#define CS40L50_BST_SHORT_MASK BIT(7) > +#define CS40L50_BST_ILIMIT_MASK BIT(18) > +#define CS40L50_UVLO_VDDBATT_MASK BIT(16) > +#define CS40L50_GLOBAL_ERROR_MASK BIT(15) > + > +enum cs40l50_irq_list { > + CS40L50_DSP_QUEUE_IRQ, > + CS40L50_GLOBAL_ERROR_IRQ, > + CS40L50_UVLO_VDDBATT_IRQ, > + CS40L50_BST_ILIMIT_IRQ, > + CS40L50_BST_SHORT_IRQ, > + CS40L50_BST_UVP_IRQ, > + CS40L50_TEMP_ERR_IRQ, > + CS40L50_AMP_SHORT_IRQ, > +}; > + > +/* DSP */ > +#define CS40L50_XMEM_PACKED_0 0x2000000 > +#define CS40L50_XMEM_UNPACKED24_0 0x2800000 > +#define CS40L50_SYS_INFO_ID 0x25E0000 > +#define CS40L50_RAM_INIT 0x28021DC > +#define CS40L50_DSP_QUEUE_WT 0x28042C8 > +#define CS40L50_DSP_QUEUE_RD 0x28042CC > +#define CS40L50_NUM_WAVES 0x2805C18 > +#define CS40L50_CORE_BASE 0x2B80000 > +#define CS40L50_CCM_CORE_CONTROL 0x2BC1000 > +#define CS40L50_YMEM_PACKED_0 0x2C00000 > +#define CS40L50_YMEM_UNPACKED24_0 0x3400000 > +#define CS40L50_PMEM_0 0x3800000 > +#define CS40L50_MEM_RDY_HW 0x2 > +#define CS40L50_RAM_INIT_FLAG 0x1 I didn't see this #define used anywhere; please double check this one and others. > +#define CS40L50_CLOCK_DISABLE 0x80 > +#define CS40L50_CLOCK_ENABLE 0x281 > +#define CS40L50_DSP_POLL_US 1000 > +#define CS40L50_DSP_TIMEOUT_COUNT 100 > +#define CS40L50_RESET_PULSE_US 2200 > +#define CS40L50_CP_READY_US 3100 > +#define CS40L50_AUTOSUSPEND_MS 2000 > +#define CS40L50_PM_ALGO 0x9F206 > +#define CS40L50_GLOBAL_ERR_RLS_SET BIT(11) > +#define CS40L50_GLOBAL_ERR_RLS_CLEAR 0 > + > +enum cs40l50_wseqs { > + CS40L50_PWR_ON, > + CS40L50_STANDBY, > + CS40L50_ACTIVE, > + CS40L50_NUM_WSEQS, > +}; > + > +/* DSP Queue */ > +#define CS40L50_DSP_QUEUE_BASE 0x11004 > +#define CS40L50_DSP_QUEUE_END 0x1101C > +#define CS40L50_DSP_QUEUE 0x11020 > +#define CS40L50_PREVENT_HIBER 0x2000003 > +#define CS40L50_ALLOW_HIBER 0x2000004 > +#define CS40L50_SHUTDOWN 0x2000005 > +#define CS40L50_SYSTEM_RESET 0x02000007 > +#define CS40L50_START_I2S 0x3000002 > +#define CS40L50_OWT_PUSH 0x3000008 > +#define CS40L50_STOP_PLAYBACK 0x5000000 > +#define CS40L50_OWT_DELETE 0xD000000 > + > +/* Firmware files */ > +#define CS40L50_FW "cs40l50.wmfw" > +#define CS40L50_WT "cs40l50.bin" > + > +/* Device */ > +#define CS40L50_DEVID 0x0 > +#define CS40L50_REVID 0x4 > +#define CS40L50_DEVID_A 0x40A50 > +#define CS40L50_REVID_B0 0xB0 > + > +struct cs40l50 { > + struct device *dev; > + struct regmap *regmap; > + struct mutex lock; > + struct cs_dsp dsp; > + struct gpio_desc *reset_gpio; > + struct regmap_irq_chip_data *irq_data; > + const struct firmware *fw; > + const struct firmware *bin; > + struct cs_dsp_wseq wseqs[CS40L50_NUM_WSEQS]; > + int irq; > + u32 devid; > + u32 revid; > +}; > + > +int cs40l50_dsp_write(struct device *dev, struct regmap *regmap, u32 val); > +int cs40l50_probe(struct cs40l50 *cs40l50); > +int cs40l50_remove(struct cs40l50 *cs40l50); > + > +extern const struct regmap_config cs40l50_regmap; > +extern const struct dev_pm_ops cs40l50_pm_ops; > + > +#endif /* __MFD_CS40L50_H__ */ > -- > 2.25.1 > Kind regards, Jeff LaBundy
On 10/03/2024 20:29, Jeff LaBundy wrote: > >> + - vio-supply >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/gpio/gpio.h> >> + #include <dt-bindings/interrupt-controller/irq.h> >> + >> + i2c { >> + #address-cells = <1>; >> + #size-cells = <0>; > > Nit: most device trees tend to use 8-column indentation as with kernel code. If you meant DTS, then kernel coding style applies, which does not use spaces. But this is a binding, so please use indentation as defined by writing-schema: 2 or 4 spaces. Best regards, Krzysztof
Hi Krzysztof, On Mon, Mar 11, 2024 at 07:31:36AM +0100, Krzysztof Kozlowski wrote: > On 10/03/2024 20:29, Jeff LaBundy wrote: > > > >> + - vio-supply > >> + > >> +additionalProperties: false > >> + > >> +examples: > >> + - | > >> + #include <dt-bindings/gpio/gpio.h> > >> + #include <dt-bindings/interrupt-controller/irq.h> > >> + > >> + i2c { > >> + #address-cells = <1>; > >> + #size-cells = <0>; > > > > Nit: most device trees tend to use 8-column indentation as with kernel code. > > If you meant DTS, then kernel coding style applies, which does not use > spaces. But this is a binding, so please use indentation as defined by > writing-schema: 2 or 4 spaces. Good to know; I'll follow this definition moving forward. > > > Best regards, > Krzysztof > Kind regards, Jeff LaBundy
Hi Charles, On Mon, Mar 11, 2024 at 10:30:53AM +0000, Charles Keepax wrote: > On Sun, Mar 10, 2024 at 06:40:04PM -0500, Jeff LaBundy wrote: > > On Fri, Mar 08, 2024 at 10:24:19PM +0000, James Ogletree wrote: > > > +static void cs40l50_start_dsp(const struct firmware *bin, void *context) > > > +{ > > > + struct cs40l50 *cs40l50 = context; > > > + int err; > > > + > > > + /* Wavetable is optional; start DSP regardless */ > > > + cs40l50->bin = bin; > > > + > > > + mutex_lock(&cs40l50->lock); > > > > It seems the mutex is used only to prevent interrupt handling while the DSP > > is being configured; can't we just call disable_irq() and enable_irq() here? > > > > The trouble with diabling the IRQ is it masks the IRQ line. That > means if the IRQ is shared with other devices you will be > silencing their IRQs for the duration as well, which is slightly > rude. Especially given the driver requests the IRQ with the > SHARED flag I would be inclinded to stick with the mutex unless > there are other reasons not to. Ah, yes; I see we're using IRQF_SHARED here. Shared interrupts seem like they made more sense for L+R audio amplifiers, and less for a haptic driver; but if customers are indeed sharing this interrupt, then the mutex is OK. > > > > +static int cs40l50_irq_init(struct cs40l50 *cs40l50) > > > +{ > > > + struct device *dev = cs40l50->dev; > > > + int err, i, virq; > > > + > > > + err = devm_regmap_add_irq_chip(dev, cs40l50->regmap, cs40l50->irq, > > > + IRQF_ONESHOT | IRQF_SHARED, 0, > > > + &cs40l50_irq_chip, &cs40l50->irq_data); > > > + if (err) { > > > + dev_err(dev, "Failed adding IRQ chip\n"); > > > > I don't see any need for individual prints in this function, since the call > > to cs40l50_irq_init() is already followed by a call to dev_err_probe(). > > I would probably suggest keeping these individual prints here and > removing the one in cs40l50_probe, it is nicer to know exactly > what failed when something goes wrong. That said at least the > devm_request_threaded_irq can probe defer so that print should be > a dev_err_probe since this function is only called on the probe > path. Makes sense to me. > > > > + dev_info(cs40l50->dev, "Cirrus Logic CS40L50 rev. %02X\n", cs40l50->revid); > > > > This should be dev_dbg(). > > > > Not sure what the concenus is on this, but personally I greatly > prefer these device ID prints being infos. Nice to always have > some indication of the device and its version. Right, but every other silicon vendor feels the same way too, and many customers' dmesg is typically quite messy for the first couple minutes. This is only one print, but my stance is that this type of information belongs in debugfs; in fact for this case, we can get this information from regmap if we know what we're looking for. > > Thanks, > Charles Kind regards, Jeff LaBundy
Hi James, This one looks pretty good; just a few nits since a new series is coming anyway. On Fri, Mar 08, 2024 at 10:24:21PM +0000, James Ogletree wrote: > Introduce support for Cirrus Logic Device CS40L50: a > haptic driver with waveform memory, integrated DSP, > and closed-loop algorithms. > > The ASoC driver enables I2S streaming to the device. > > Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com> > --- > MAINTAINERS | 1 + > sound/soc/codecs/Kconfig | 11 ++ > sound/soc/codecs/Makefile | 2 + > sound/soc/codecs/cs40l50-codec.c | 307 +++++++++++++++++++++++++++++++ > 4 files changed, 321 insertions(+) > create mode 100644 sound/soc/codecs/cs40l50-codec.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index 24cfb4f017bb..fca2454a7a38 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -4943,6 +4943,7 @@ F: Documentation/devicetree/bindings/input/cirrus,cs40l50.yaml > F: drivers/input/misc/cs40l* > F: drivers/mfd/cs40l* > F: include/linux/mfd/cs40l* > +F: sound/soc/codecs/cs40l* > > CIRRUS LOGIC DSP FIRMWARE DRIVER > M: Simon Trimmer <simont@opensource.cirrus.com> > diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig > index f1e1dbc509f6..1a81bedfdbe3 100644 > --- a/sound/soc/codecs/Kconfig > +++ b/sound/soc/codecs/Kconfig > @@ -73,6 +73,7 @@ config SND_SOC_ALL_CODECS > imply SND_SOC_CS35L56_I2C > imply SND_SOC_CS35L56_SPI > imply SND_SOC_CS35L56_SDW > + imply SND_SOC_CS40L50 > imply SND_SOC_CS42L42 > imply SND_SOC_CS42L42_SDW > imply SND_SOC_CS42L43 > @@ -800,6 +801,16 @@ config SND_SOC_CS35L56_SDW > help > Enable support for Cirrus Logic CS35L56 boosted amplifier with SoundWire control > > +config SND_SOC_CS40L50 > + tristate "Cirrus Logic CS40L50 CODEC" > + depends on MFD_CS40L50_CORE > + help > + This option enables support for I2S streaming to Cirrus Logic CS40L50. > + > + CS40L50 is a haptic driver with waveform memory, an integrated > + DSP, and closed-loop algorithms. If built as a module, it will be > + called snd-soc-cs40l50. > + > config SND_SOC_CS42L42_CORE > tristate > > diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile > index a87e56938ce5..7e31f000774a 100644 > --- a/sound/soc/codecs/Makefile > +++ b/sound/soc/codecs/Makefile > @@ -74,6 +74,7 @@ snd-soc-cs35l56-shared-objs := cs35l56-shared.o > snd-soc-cs35l56-i2c-objs := cs35l56-i2c.o > snd-soc-cs35l56-spi-objs := cs35l56-spi.o > snd-soc-cs35l56-sdw-objs := cs35l56-sdw.o > +snd-soc-cs40l50-objs := cs40l50-codec.o > snd-soc-cs42l42-objs := cs42l42.o > snd-soc-cs42l42-i2c-objs := cs42l42-i2c.o > snd-soc-cs42l42-sdw-objs := cs42l42-sdw.o > @@ -460,6 +461,7 @@ obj-$(CONFIG_SND_SOC_CS35L56_SHARED) += snd-soc-cs35l56-shared.o > obj-$(CONFIG_SND_SOC_CS35L56_I2C) += snd-soc-cs35l56-i2c.o > obj-$(CONFIG_SND_SOC_CS35L56_SPI) += snd-soc-cs35l56-spi.o > obj-$(CONFIG_SND_SOC_CS35L56_SDW) += snd-soc-cs35l56-sdw.o > +obj-$(CONFIG_SND_SOC_CS40L50) += snd-soc-cs40l50.o > obj-$(CONFIG_SND_SOC_CS42L42_CORE) += snd-soc-cs42l42.o > obj-$(CONFIG_SND_SOC_CS42L42) += snd-soc-cs42l42-i2c.o > obj-$(CONFIG_SND_SOC_CS42L42_SDW) += snd-soc-cs42l42-sdw.o > diff --git a/sound/soc/codecs/cs40l50-codec.c b/sound/soc/codecs/cs40l50-codec.c > new file mode 100644 > index 000000000000..23299b8dacfb > --- /dev/null > +++ b/sound/soc/codecs/cs40l50-codec.c > @@ -0,0 +1,307 @@ > +// SPDX-License-Identifier: GPL-2.0 > +// > +// CS40L50 Advanced Haptic Driver with waveform memory, > +// integrated DSP, and closed-loop algorithms > +// > +// Copyright 2024 Cirrus Logic, Inc. > +// > +// Author: James Ogletree <james.ogletree@cirrus.com> Typically we see a // C++ style comment for the SPDX identifier, and then /* block comments */ for the rest, unless the maintainer has explicitly asked for this style for this specific subsystem. The introductory block in the rest of the series is much more common. > + > +#include <linux/bitfield.h> > +#include <linux/mfd/cs40l50.h> > +#include <linux/pm_runtime.h> > +#include <sound/pcm_params.h> > +#include <sound/soc.h> > + > +#define CS40L50_REFCLK_INPUT 0x2C04 > +#define CS40L50_ASP_CONTROL2 0x4808 > +#define CS40L50_ASP_DATA_CONTROL5 0x4840 > + > +/* PLL Config */ > +#define CS40L50_PLL_REFCLK_BCLK 0x0 > +#define CS40L50_PLL_REFCLK_MCLK 0x5 > +#define CS40L50_PLL_REFCLK_LOOP_MASK BIT(11) > +#define CS40L50_PLL_REFCLK_OPEN_LOOP 1 > +#define CS40L50_PLL_REFCLK_CLOSED_LOOP 0 > +#define CS40L50_PLL_REFCLK_LOOP_SHIFT 11 > +#define CS40L50_PLL_REFCLK_FREQ_MASK GENMASK(10, 5) > +#define CS40L50_PLL_REFCLK_FREQ_SHIFT 5 > +#define CS40L50_PLL_REFCLK_SEL_MASK GENMASK(2, 0) > +#define CS40L50_BCLK_RATIO_DEFAULT 32 > + > +/* ASP Config */ > +#define CS40L50_ASP_RX_WIDTH_SHIFT 24 > +#define CS40L50_ASP_RX_WIDTH_MASK GENMASK(31, 24) > +#define CS40L50_ASP_RX_WL_MASK GENMASK(5, 0) > +#define CS40L50_ASP_FSYNC_INV_MASK BIT(2) > +#define CS40L50_ASP_BCLK_INV_MASK BIT(6) > +#define CS40L50_ASP_FMT_MASK GENMASK(10, 8) > +#define CS40L50_ASP_FMT_I2S 0x2 > + > +struct cs40l50_pll_config { > + unsigned int freq; > + unsigned int cfg; > +}; > + > +struct cs40l50_codec { > + struct device *dev; > + struct regmap *regmap; > + unsigned int daifmt; > + unsigned int bclk_ratio; > + unsigned int rate; > +}; > + > +static const struct cs40l50_pll_config cs40l50_pll_cfg[] = { > + {32768, 0x00}, > + {1536000, 0x1B}, > + {3072000, 0x21}, > + {6144000, 0x28}, > + {9600000, 0x30}, > + {12288000, 0x33}, Nit: please space these as is done elsewhere throughout the series, i.e.: { 12288000, 0x33 }, > +}; > + > +static int cs40l50_get_clk_config(unsigned int freq, unsigned int *cfg) > +{ > + int i; > + > + for (i = 0; i < ARRAY_SIZE(cs40l50_pll_cfg); i++) { > + if (cs40l50_pll_cfg[i].freq == freq) { > + *cfg = cs40l50_pll_cfg[i].cfg; > + return 0; > + } > + } > + > + return -EINVAL; > +} > + > +static int cs40l50_swap_ext_clk(struct cs40l50_codec *codec, unsigned int clk_src) > +{ > + unsigned int cfg; > + int ret; > + > + switch (clk_src) { > + case CS40L50_PLL_REFCLK_BCLK: > + ret = cs40l50_get_clk_config(codec->bclk_ratio * codec->rate, &cfg); > + if (ret) > + return ret; > + break; > + case CS40L50_PLL_REFCLK_MCLK: > + cfg = 0x00; 0x00 seems special; please consider #defining it. > + break; > + default: > + return -EINVAL; > + } > + > + ret = regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, > + CS40L50_PLL_REFCLK_LOOP_MASK, > + CS40L50_PLL_REFCLK_OPEN_LOOP << > + CS40L50_PLL_REFCLK_LOOP_SHIFT); > + if (ret) > + return ret; > + > + ret = regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, > + CS40L50_PLL_REFCLK_FREQ_MASK | > + CS40L50_PLL_REFCLK_SEL_MASK, > + (cfg << CS40L50_PLL_REFCLK_FREQ_SHIFT) | clk_src); > + if (ret) > + return ret; > + > + return regmap_update_bits(codec->regmap, CS40L50_REFCLK_INPUT, > + CS40L50_PLL_REFCLK_LOOP_MASK, > + CS40L50_PLL_REFCLK_CLOSED_LOOP << > + CS40L50_PLL_REFCLK_LOOP_SHIFT); > +} > + > +static int cs40l50_clk_en(struct snd_soc_dapm_widget *w, > + struct snd_kcontrol *kcontrol, > + int event) > +{ > + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); > + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(comp); > + int ret; > + > + switch (event) { > + case SND_SOC_DAPM_POST_PMU: > + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_STOP_PLAYBACK); > + if (ret) > + return ret; > + > + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_START_I2S); > + if (ret) > + return ret; > + > + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_BCLK); > + if (ret) > + return ret; > + break; > + case SND_SOC_DAPM_PRE_PMD: > + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_MCLK); > + if (ret) > + return ret; > + break; Just for my own understanding, does the HALO core need to be told that I2S streaming is about to stop? Or does the L50 gracefully park the class D outputs when the PLL source is suddenly switched? > + default: > + return -EINVAL; > + } > + > + return 0; > +} > + > +static const struct snd_soc_dapm_widget cs40l50_dapm_widgets[] = { > + SND_SOC_DAPM_SUPPLY_S("ASP PLL", 0, SND_SOC_NOPM, 0, 0, cs40l50_clk_en, > + SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), > + SND_SOC_DAPM_AIF_IN("ASPRX1", NULL, 0, SND_SOC_NOPM, 0, 0), > + SND_SOC_DAPM_AIF_IN("ASPRX2", NULL, 0, SND_SOC_NOPM, 0, 0), > + SND_SOC_DAPM_OUTPUT("OUT"), > +}; > + > +static const struct snd_soc_dapm_route cs40l50_dapm_routes[] = { > + { "ASP Playback", NULL, "ASP PLL" }, > + { "ASPRX1", NULL, "ASP Playback" }, > + { "ASPRX2", NULL, "ASP Playback" }, > + > + { "OUT", NULL, "ASPRX1" }, > + { "OUT", NULL, "ASPRX2" }, > +}; > + > +static int cs40l50_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) > +{ > + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(codec_dai->component); > + > + if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBC_CFC) > + return -EINVAL; > + > + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { > + case SND_SOC_DAIFMT_NB_NF: > + codec->daifmt = 0; > + break; > + case SND_SOC_DAIFMT_NB_IF: > + codec->daifmt = CS40L50_ASP_FSYNC_INV_MASK; > + break; > + case SND_SOC_DAIFMT_IB_NF: > + codec->daifmt = CS40L50_ASP_BCLK_INV_MASK; > + break; > + case SND_SOC_DAIFMT_IB_IF: > + codec->daifmt = CS40L50_ASP_FSYNC_INV_MASK | CS40L50_ASP_BCLK_INV_MASK; > + break; > + default: > + dev_err(codec->dev, "Invalid clock invert\n"); > + return -EINVAL; > + } > + > + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { > + case SND_SOC_DAIFMT_I2S: > + codec->daifmt |= FIELD_PREP(CS40L50_ASP_FMT_MASK, CS40L50_ASP_FMT_I2S); > + break; > + default: > + dev_err(codec->dev, "Unsupported DAI format\n"); > + return -EINVAL; > + } > + > + return 0; > +} > + > +static int cs40l50_hw_params(struct snd_pcm_substream *substream, > + struct snd_pcm_hw_params *params, > + struct snd_soc_dai *dai) > +{ > + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(dai->component); > + unsigned int asp_rx_wl = params_width(params); > + int ret; > + > + codec->rate = params_rate(params); > + > + ret = regmap_update_bits(codec->regmap, CS40L50_ASP_DATA_CONTROL5, > + CS40L50_ASP_RX_WL_MASK, asp_rx_wl); > + if (ret) > + return ret; > + > + codec->daifmt |= (asp_rx_wl << CS40L50_ASP_RX_WIDTH_SHIFT); > + > + return regmap_update_bits(codec->regmap, CS40L50_ASP_CONTROL2, > + CS40L50_ASP_FSYNC_INV_MASK | > + CS40L50_ASP_BCLK_INV_MASK | > + CS40L50_ASP_FMT_MASK | > + CS40L50_ASP_RX_WIDTH_MASK, codec->daifmt); > +} > + > +static int cs40l50_set_dai_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) > +{ > + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(dai->component); > + > + codec->bclk_ratio = ratio; > + > + return 0; > +} > + > +static const struct snd_soc_dai_ops cs40l50_dai_ops = { > + .set_fmt = cs40l50_set_dai_fmt, > + .set_bclk_ratio = cs40l50_set_dai_bclk_ratio, > + .hw_params = cs40l50_hw_params, > +}; > + > +static struct snd_soc_dai_driver cs40l50_dai[] = { > + { > + .name = "cs40l50-pcm", > + .id = 0, > + .playback = { > + .stream_name = "ASP Playback", > + .channels_min = 1, > + .channels_max = 2, > + .rates = SNDRV_PCM_RATE_48000, > + .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, > + }, > + .ops = &cs40l50_dai_ops, > + }, > +}; > + > +static int cs40l50_codec_probe(struct snd_soc_component *component) > +{ > + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(component); > + > + codec->bclk_ratio = CS40L50_BCLK_RATIO_DEFAULT; > + > + return 0; > +} > + > +static const struct snd_soc_component_driver soc_codec_dev_cs40l50 = { > + .probe = cs40l50_codec_probe, > + .dapm_widgets = cs40l50_dapm_widgets, > + .num_dapm_widgets = ARRAY_SIZE(cs40l50_dapm_widgets), > + .dapm_routes = cs40l50_dapm_routes, > + .num_dapm_routes = ARRAY_SIZE(cs40l50_dapm_routes), > +}; > + > +static int cs40l50_codec_driver_probe(struct platform_device *pdev) > +{ > + struct cs40l50 *cs40l50 = dev_get_drvdata(pdev->dev.parent); > + struct cs40l50_codec *codec; > + > + codec = devm_kzalloc(&pdev->dev, sizeof(*codec), GFP_KERNEL); > + if (!codec) > + return -ENOMEM; > + > + codec->regmap = cs40l50->regmap; > + codec->dev = &pdev->dev; > + > + return devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_cs40l50, > + cs40l50_dai, ARRAY_SIZE(cs40l50_dai)); > +} > + > +static const struct platform_device_id cs40l50_id[] = { > + { "cs40l50-codec", }, > + {} > +}; > +MODULE_DEVICE_TABLE(platform, cs40l50_id); > + > +static struct platform_driver cs40l50_codec_driver = { > + .probe = cs40l50_codec_driver_probe, > + .id_table = cs40l50_id, > + .driver = { > + .name = "cs40l50-codec", > + }, > +}; > +module_platform_driver(cs40l50_codec_driver); > + > +MODULE_DESCRIPTION("ASoC CS40L50 driver"); > +MODULE_AUTHOR("James Ogletree <james.ogletree@cirrus.com>"); > +MODULE_LICENSE("GPL"); > -- > 2.25.1 > Kind regards, Jeff LaBundy
On Thu, Mar 14, 2024 at 11:05:01AM -0500, Jeff LaBundy wrote: > On Fri, Mar 08, 2024 at 10:24:21PM +0000, James Ogletree wrote: > > Introduce support for Cirrus Logic Device CS40L50: a > > haptic driver with waveform memory, integrated DSP, > > and closed-loop algorithms. Please delete unneeded context from mails when replying. Doing this makes it much easier to find your reply in the message, helping ensure it won't be missed by people scrolling through the irrelevant quoted material. > > +// SPDX-License-Identifier: GPL-2.0 > > +// > > +// CS40L50 Advanced Haptic Driver with waveform memory, > > +// integrated DSP, and closed-loop algorithms > > +// > > +// Copyright 2024 Cirrus Logic, Inc. > > +// > > +// Author: James Ogletree <james.ogletree@cirrus.com> > Typically we see a // C++ style comment for the SPDX identifier, and then > /* block comments */ for the rest, unless the maintainer has explicitly > asked for this style for this specific subsystem. The introductory block > in the rest of the series is much more common. This is something I specifically request.
Hi Jeff, Thank you for the kind remarks and thorough review. All of your points, here and across the series, you can consider acknowledged and I will work to adopt them in the next version. There were a few loose ends and questions throughout the series which I intend to address over the coming days. The first one is below. >> + >> +static const struct reg_sequence cs40l50_irq_mask_override[] = { >> + { CS40L50_IRQ1_MASK_2, CS40L50_IRQ_MASK_2_OVERRIDE }, >> + { CS40L50_IRQ1_MASK_20, CS40L50_IRQ_MASK_20_OVERRIDE }, >> +}; >> + >> +static int cs40l50_configure_dsp(struct cs_dsp *dsp) >> +{ >> + struct cs40l50 *cs40l50 = container_of(dsp, struct cs40l50, dsp); >> + u32 nwaves; >> + int err; >> + >> + /* Log number of effects if wavetable was loaded */ >> + if (cs40l50->bin) { > > Is there any other clue you can use to discern whether a wavetable was > loaded? The memory at cs40l50->bin is gone now, and although you're not > dereferencing it anymore, another contributor might be fooled into doing > so down the road. > > Maybe a boolean would be more maintainable; I don't feel strongly about > it though. I will simply remove the conditional. If no wavetable was loaded, the register will have a value of 0, which is no less worthwhile to report to the user. Best, James
> On Mar 14, 2024, at 11:05 AM, Jeff LaBundy <jeff@labundy.com> wrote: > > On Fri, Mar 08, 2024 at 10:24:21PM +0000, James Ogletree wrote: >> >> +static int cs40l50_clk_en(struct snd_soc_dapm_widget *w, >> + struct snd_kcontrol *kcontrol, >> + int event) >> +{ >> + struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm); >> + struct cs40l50_codec *codec = snd_soc_component_get_drvdata(comp); >> + int ret; >> + >> + switch (event) { >> + case SND_SOC_DAPM_POST_PMU: >> + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_STOP_PLAYBACK); >> + if (ret) >> + return ret; >> + >> + ret = cs40l50_dsp_write(codec->dev, codec->regmap, CS40L50_START_I2S); >> + if (ret) >> + return ret; >> + >> + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_BCLK); >> + if (ret) >> + return ret; >> + break; >> + case SND_SOC_DAPM_PRE_PMD: >> + ret = cs40l50_swap_ext_clk(codec, CS40L50_PLL_REFCLK_MCLK); >> + if (ret) >> + return ret; >> + break; > > Just for my own understanding, does the HALO core need to be told that I2S > streaming is about to stop? Or does the L50 gracefully park the class D > outputs when the PLL source is suddenly switched? The only time we enter this pre-power down DAPM event code path is if the stream ends on its own, or if a stop has already been sent to the DSP. So the former, but there is no need to tell the DSP anything here. Best, James