| Message ID | 20240303021925.116609-2-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target/hppa: Fix some wide mode displacements | expand |
On 3/3/24 03:19, Richard Henderson wrote: > Reported-by: Sven Schnelle <svens@stackframe.org> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/hppa/insns.decode | 15 +++++++++------ > target/hppa/translate.c | 21 +++++++++++++++++++++ > 2 files changed, 30 insertions(+), 6 deletions(-) > > diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode > index f5a3f02fd1..0d9f8159ec 100644 > --- a/target/hppa/insns.decode > +++ b/target/hppa/insns.decode > @@ -27,13 +27,14 @@ > %assemble_11a 0:s1 4:10 !function=expand_shl3 > %assemble_12 0:s1 2:1 3:10 !function=expand_shl2 > %assemble_12a 0:s1 3:11 !function=expand_shl2 > +%assemble_16 0:16 !function=expand_16 > %assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2 > %assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2 > +%assemble_sp 14:2 !function=sp0_if_wide > > %assemble_21 0:s1 1:11 14:2 16:5 12:2 !function=expand_shl11 > > %lowsign_11 0:s1 1:10 > -%lowsign_14 0:s1 1:13 > > %sm_imm 16:10 !function=expand_sm_imm > > @@ -221,7 +222,7 @@ sub_b_tsv 000010 ..... ..... .... 110100 . ..... @rrr_cf_d > > ldil 001000 t:5 ..................... i=%assemble_21 > addil 001010 r:5 ..................... i=%assemble_21 > -ldo 001101 b:5 t:5 -- .............. i=%lowsign_14 > +ldo 001101 b:5 t:5 ................ i=%assemble_16 > > addi 101101 ..... ..... .... 0 ........... @rri_cf > addi_tsv 101101 ..... ..... .... 1 ........... @rri_cf > @@ -306,10 +307,12 @@ fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi > > @ldstim11 ...... b:5 t:5 sp:2 .............. \ > &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3 > -@ldstim14 ...... b:5 t:5 sp:2 .............. \ > - &ldst disp=%lowsign_14 x=0 scale=0 m=0 > -@ldstim14m ...... b:5 t:5 sp:2 .............. \ > - &ldst disp=%lowsign_14 x=0 scale=0 m=%neg_to_m > +@ldstim14 ...... b:5 t:5 ................ \ > + &ldst sp=%assemble_sp disp=%assemble_16 \ > + x=0 scale=0 m=0 > +@ldstim14m ...... b:5 t:5 ................ \ > + &ldst sp=%assemble_sp disp=%assemble_16 \ > + x=0 scale=0 m=%neg_to_m > @ldstim12m ...... b:5 t:5 sp:2 .............. \ > &ldst disp=%assemble_12a x=0 scale=0 m=%pos_to_m > > diff --git a/target/hppa/translate.c b/target/hppa/translate.c > index 01f3188656..585d836959 100644 > --- a/target/hppa/translate.c > +++ b/target/hppa/translate.c > @@ -144,6 +144,27 @@ static int assemble_6(DisasContext *ctx, int val) > return (val ^ 31) + 1; > } > > +/* Expander for assemble_16(s,im14). */ > +static int expand_16(DisasContext *ctx, int val) > +{ > + /* > + * @val is bits [0:15], containing both im14 and s. > + * Swizzle thing around depending on PSW.W. > + */ > + int i = (-(val & 1) << 13) | extract32(val, 1, 13); > + > + if (ctx->tb_flags & PSW_W) { > + i ^= val & (3 << 13); Patch boots when I change to: + i ^= ((val >> 14) & 3) << 13; Helge > + } > + return i; > +} > + > +/* The sp field is only present with !PSW_W. */ > +static int sp0_if_wide(DisasContext *ctx, int sp) > +{ > + return ctx->tb_flags & PSW_W ? 0 : sp; > +} > + > /* Translate CMPI doubleword conditions to standard. */ > static int cmpbid_c(DisasContext *ctx, int val) > {
On 3/2/24 20:43, Helge Deller wrote: >> +/* Expander for assemble_16(s,im14). */ >> +static int expand_16(DisasContext *ctx, int val) >> +{ >> + /* >> + * @val is bits [0:15], containing both im14 and s. >> + * Swizzle thing around depending on PSW.W. >> + */ >> + int i = (-(val & 1) << 13) | extract32(val, 1, 13); >> + >> + if (ctx->tb_flags & PSW_W) { >> + i ^= val & (3 << 13); > > Patch boots when I change to: > + i ^= ((val >> 14) & 3) << 13; > Whoops, yes. r~
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index f5a3f02fd1..0d9f8159ec 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -27,13 +27,14 @@ %assemble_11a 0:s1 4:10 !function=expand_shl3 %assemble_12 0:s1 2:1 3:10 !function=expand_shl2 %assemble_12a 0:s1 3:11 !function=expand_shl2 +%assemble_16 0:16 !function=expand_16 %assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2 %assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2 +%assemble_sp 14:2 !function=sp0_if_wide %assemble_21 0:s1 1:11 14:2 16:5 12:2 !function=expand_shl11 %lowsign_11 0:s1 1:10 -%lowsign_14 0:s1 1:13 %sm_imm 16:10 !function=expand_sm_imm @@ -221,7 +222,7 @@ sub_b_tsv 000010 ..... ..... .... 110100 . ..... @rrr_cf_d ldil 001000 t:5 ..................... i=%assemble_21 addil 001010 r:5 ..................... i=%assemble_21 -ldo 001101 b:5 t:5 -- .............. i=%lowsign_14 +ldo 001101 b:5 t:5 ................ i=%assemble_16 addi 101101 ..... ..... .... 0 ........... @rri_cf addi_tsv 101101 ..... ..... .... 1 ........... @rri_cf @@ -306,10 +307,12 @@ fstd 001011 ..... ..... .. . 1 -- 100 0 . ..... @fldstdi @ldstim11 ...... b:5 t:5 sp:2 .............. \ &ldst disp=%assemble_11a m=%ma2_to_m x=0 scale=0 size=3 -@ldstim14 ...... b:5 t:5 sp:2 .............. \ - &ldst disp=%lowsign_14 x=0 scale=0 m=0 -@ldstim14m ...... b:5 t:5 sp:2 .............. \ - &ldst disp=%lowsign_14 x=0 scale=0 m=%neg_to_m +@ldstim14 ...... b:5 t:5 ................ \ + &ldst sp=%assemble_sp disp=%assemble_16 \ + x=0 scale=0 m=0 +@ldstim14m ...... b:5 t:5 ................ \ + &ldst sp=%assemble_sp disp=%assemble_16 \ + x=0 scale=0 m=%neg_to_m @ldstim12m ...... b:5 t:5 sp:2 .............. \ &ldst disp=%assemble_12a x=0 scale=0 m=%pos_to_m diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 01f3188656..585d836959 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -144,6 +144,27 @@ static int assemble_6(DisasContext *ctx, int val) return (val ^ 31) + 1; } +/* Expander for assemble_16(s,im14). */ +static int expand_16(DisasContext *ctx, int val) +{ + /* + * @val is bits [0:15], containing both im14 and s. + * Swizzle thing around depending on PSW.W. + */ + int i = (-(val & 1) << 13) | extract32(val, 1, 13); + + if (ctx->tb_flags & PSW_W) { + i ^= val & (3 << 13); + } + return i; +} + +/* The sp field is only present with !PSW_W. */ +static int sp0_if_wide(DisasContext *ctx, int sp) +{ + return ctx->tb_flags & PSW_W ? 0 : sp; +} + /* Translate CMPI doubleword conditions to standard. */ static int cmpbid_c(DisasContext *ctx, int val) {
Reported-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/hppa/insns.decode | 15 +++++++++------ target/hppa/translate.c | 21 +++++++++++++++++++++ 2 files changed, 30 insertions(+), 6 deletions(-)