| Message ID | 20240106223951.387067-2-aford173@gmail.com |
|---|---|
| State | Accepted |
| Commit | 697624ee8ad557ab5417f985d2c804241a7ad30d |
| Headers | show |
| Series | [1/3] dt-bindings: soc: imx: add fdcc clock to i.MX8MP hdmi blk ctrl | expand |
On Sat, 6 Jan 2024 at 23:40, Adam Ford <aford173@gmail.com> wrote: > > According to i.MX8MP RM and HDMI ADD, the fdcc clock is part of > hdmi rx verification IP that should not enable for HDMI TX. > But actually if the clock is disabled before HDMI/LCDIF probe, > LCDIF will not get pixel clock from HDMI PHY and print the error > logs: > > [CRTC:39:crtc-2] vblank wait timed out > WARNING: CPU: 2 PID: 9 at drivers/gpu/drm/drm_atomic_helper.c:1634 drm_atomic_helper_wait_for_vblanks.part.0+0x23c/0x260 > > Add fdcc clock to LCDIF and HDMI TX power domains to fix the issue. > > Signed-off-by: Sandor Yu <Sandor.yu@nxp.com> > Reviewed-by: Jacky Bai <ping.bai@nxp.com> > Signed-off-by: Adam Ford <aford173@gmail.com> Just to let you know, this looks good to me and it seems like the NXP people like this too. What I am waiting for is an ack on the DT patch, then I am ready to queue this up. Kind regards Uffe > --- > The original work was from Sandor on the NXP Down-stream kernel > > diff --git a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c > index e3203eb6a022..a56f7f92d091 100644 > --- a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c > +++ b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c > @@ -55,7 +55,7 @@ struct imx8mp_blk_ctrl_domain_data { > const char *gpc_name; > }; > > -#define DOMAIN_MAX_CLKS 2 > +#define DOMAIN_MAX_CLKS 3 > #define DOMAIN_MAX_PATHS 3 > > struct imx8mp_blk_ctrl_domain { > @@ -457,8 +457,8 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = { > }, > [IMX8MP_HDMIBLK_PD_LCDIF] = { > .name = "hdmiblk-lcdif", > - .clk_names = (const char *[]){ "axi", "apb" }, > - .num_clks = 2, > + .clk_names = (const char *[]){ "axi", "apb", "fdcc" }, > + .num_clks = 3, > .gpc_name = "lcdif", > .path_names = (const char *[]){"lcdif-hdmi"}, > .num_paths = 1, > @@ -483,8 +483,8 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = { > }, > [IMX8MP_HDMIBLK_PD_HDMI_TX] = { > .name = "hdmiblk-hdmi-tx", > - .clk_names = (const char *[]){ "apb", "ref_266m" }, > - .num_clks = 2, > + .clk_names = (const char *[]){ "apb", "ref_266m", "fdcc" }, > + .num_clks = 3, > .gpc_name = "hdmi-tx", > }, > [IMX8MP_HDMIBLK_PD_HDMI_TX_PHY] = { > -- > 2.43.0 >
diff --git a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c index e3203eb6a022..a56f7f92d091 100644 --- a/drivers/pmdomain/imx/imx8mp-blk-ctrl.c +++ b/drivers/pmdomain/imx/imx8mp-blk-ctrl.c @@ -55,7 +55,7 @@ struct imx8mp_blk_ctrl_domain_data { const char *gpc_name; }; -#define DOMAIN_MAX_CLKS 2 +#define DOMAIN_MAX_CLKS 3 #define DOMAIN_MAX_PATHS 3 struct imx8mp_blk_ctrl_domain { @@ -457,8 +457,8 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = { }, [IMX8MP_HDMIBLK_PD_LCDIF] = { .name = "hdmiblk-lcdif", - .clk_names = (const char *[]){ "axi", "apb" }, - .num_clks = 2, + .clk_names = (const char *[]){ "axi", "apb", "fdcc" }, + .num_clks = 3, .gpc_name = "lcdif", .path_names = (const char *[]){"lcdif-hdmi"}, .num_paths = 1, @@ -483,8 +483,8 @@ static const struct imx8mp_blk_ctrl_domain_data imx8mp_hdmi_domain_data[] = { }, [IMX8MP_HDMIBLK_PD_HDMI_TX] = { .name = "hdmiblk-hdmi-tx", - .clk_names = (const char *[]){ "apb", "ref_266m" }, - .num_clks = 2, + .clk_names = (const char *[]){ "apb", "ref_266m", "fdcc" }, + .num_clks = 3, .gpc_name = "hdmi-tx", }, [IMX8MP_HDMIBLK_PD_HDMI_TX_PHY] = {