Message ID | 20240123165831.970023-1-avromanov@salutedevices.com |
---|---|
Headers | show |
Series | Support more Amlogic SoC families in crypto driver | expand |
On 23/01/2024 17:58, Alexey Romanov wrote: > This patch adds a crypto node declaration. With the > Amlogic crypto driver we can use HW implementation > of SHA1/224/256 and AES algo. > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index 7e5ac9db93f8..39ecb894668e 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -286,6 +286,12 @@ ethmac: ethernet@ff3f0000 { > status = "disabled"; > }; > > + crypto: crypto@ff63e000 { > + compatible = "amlogic,axg-crypto"; Test your code. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Best regards, Krzysztof
On Tue 23 Jan 2024 at 19:58, Alexey Romanov <avromanov@salutedevices.com> wrote: > Not all Amlogic SoC's uses CLK controller. That's fairly short description and very likely to be wrong. Of all the SoCs I have seen mentionned in the bindings, they all have clock "controllers" I'd assume you meant "this crypto ip does not take a clock input on some SoCs", correct ? If that is what you mean, giving the list of the SoCs which - according to you - do or don't take a clock ip input would be helpful. > > Signed-off-by: Alexey Romanov <avromanov@salutedevices.com> > --- > drivers/crypto/amlogic/amlogic-gxl-core.c | 11 ++--------- > 1 file changed, 2 insertions(+), 9 deletions(-) > > diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c > index 35ec64df5b3a..a58644be76e9 100644 > --- a/drivers/crypto/amlogic/amlogic-gxl-core.c > +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c > @@ -263,16 +263,10 @@ static int meson_crypto_probe(struct platform_device *pdev) > dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err); > return err; > } > - mc->busclk = devm_clk_get(&pdev->dev, "blkmv"); > + mc->busclk = devm_clk_get_optional_enabled(&pdev->dev, "blkmv"); Assuming some SoC actually don't have an input clock (I'm not convinced), the clock still ain't optional for the ones which do. Use the compatible to properly claim the ressource (or not) > if (IS_ERR(mc->busclk)) { > err = PTR_ERR(mc->busclk); > - dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err); > - return err; > - } > - > - err = clk_prepare_enable(mc->busclk); > - if (err != 0) { > - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); > + dev_err(&pdev->dev, "Cannot get and enable core clock err=%d\n", err); > return err; > } > > @@ -300,7 +294,6 @@ static int meson_crypto_probe(struct platform_device *pdev) > meson_unregister_algs(mc); > error_flow: > meson_free_chanlist(mc, mc->flow_cnt - 1); > - clk_disable_unprepare(mc->busclk); > return err; > }
Hi, On 23/01/2024 17:58, Alexey Romanov wrote: > Hello! > > This patchset expand the funcionality of the Amlogic > crypto driver by adding support for more SoC families: > AXG, G12A, G12B, SM1, A1, S4. > > Also specify and enable crypto node in device tree > for reference Amlogic devices. > > Tested on AXG, G12A/B, SM1, A1 and S4 devices via > custom tests and trcypt module. Please describe which tests you ran for next version. Neil > > --- > > Changes V1 -> V2: > > - Rebased over linux-next. > - Adjusted device tree bindings description. > - A1 and S4 dts use their own compatible, which is a G12 fallback. This is not what I meant by fallback, I was meaning having: compatible = "amlogic,a1-crypto", "amlogic,g12a-crypto"; and them only add "amlogic,g12a-crypto" in the driver. Same for S4. Neil > > V1: https://lore.kernel.org/all/20240110201216.18016-1-avromanov@salutedevices.com/ > > Alexey Romanov (20): > drivers: crypto: meson: don't hardcode IRQ count > drivers: crypto: meson: make CLK controller optional > drviers: crypto: meson: add platform data > drivers: crypto: meson: add MMIO helpers > drivers: crypto: meson: move get_engine_number() > drivers: crypto: meson: drop status field from meson_flow > drivers: crypto: meson: move algs definition and cipher API to > cipher.c > drivers: crypto: meson: cleanup defines > drivers: crypto: meson: process more than MAXDESCS descriptors > drivers: crypto: meson: avoid kzalloc in engine thread > drivers: crypto: meson: introduce hasher > drivers: crypto: meson: add support for AES-CTR > drivers: crypto: meson: use fallback for 192-bit keys > drivers: crypto: meson: add support for G12-series > drivers: crypto: meson: add support for AXG-series > dt-bindings: crypto: meson: add new compatibles > arch: arm64: dts: meson: a1: add crypto node > arch: arm64: dts: meson: s4: add crypto node > arch: arm64: dts: meson: g12: add crypto node > arch: arm64: dts: meson: axg: add crypto node > > .../bindings/crypto/amlogic,gxl-crypto.yaml | 31 +- > arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 7 + > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 + > .../boot/dts/amlogic/meson-g12-common.dtsi | 6 + > arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 6 + > drivers/crypto/amlogic/Makefile | 2 +- > drivers/crypto/amlogic/amlogic-gxl-cipher.c | 602 ++++++++++++------ > drivers/crypto/amlogic/amlogic-gxl-core.c | 281 ++++---- > drivers/crypto/amlogic/amlogic-gxl-hasher.c | 452 +++++++++++++ > drivers/crypto/amlogic/amlogic-gxl.h | 115 +++- > 10 files changed, 1165 insertions(+), 343 deletions(-) > create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c >