| Message ID | 20240113-pmi632-typec-v2-15-182d9aa0a5b3@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | usb: typec: qcom-pmic-typec: enable support for PMI632 PMIC | expand |
On Sat Jan 13, 2024 at 9:55 PM CET, Dmitry Baryshkov wrote: > Plug in USB-C related bits and pieces to enable USB role switching and > USB-C orientation handling for the Qualcomm RB2 board. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 50 ++++++++++++++++++++++++++++++++ > arch/arm64/boot/dts/qcom/sm6115.dtsi | 43 +++++++++++++++++++++++++++ > 2 files changed, 93 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > index 52f31f3166c2..696d6d43c56b 100644 > --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > @@ -6,8 +6,10 @@ > /dts-v1/; > > #include <dt-bindings/leds/common.h> > +#include <dt-bindings/usb/pd.h> > #include "sm4250.dtsi" > #include "pm6125.dtsi" > +#include "pmi632.dtsi" > > / { > model = "Qualcomm Technologies, Inc. QRB4210 RB2"; > @@ -256,6 +258,46 @@ kypd_vol_up_n: kypd-vol-up-n-state { > }; > }; > > +&pmi632_typec { > + status = "okay"; > + > + connector { > + compatible = "usb-c-connector"; > + > + power-role = "dual"; > + data-role = "dual"; > + self-powered; > + > + typec-power-opmode = "default"; > + pd-disable; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pmi632_hs_in: endpoint { > + remote-endpoint = <&usb_dwc3_hs>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pmi632_ss_in: endpoint { > + remote-endpoint = <&usb_qmpphy_out>; > + }; > + }; > + }; > + }; > +}; > + > +&pmi632_vbus { > + regulator-min-microamp = <500000>; > + regulator-max-microamp = <3000000>; Hi Dmitry, Are you sure vbus can supply 3000mA? In Qualcomm's document 80-PF208-77 I see 1000mA is the maximum it can provide, and I see the same value looking into downstream smb5 driver in sdm632 sources. https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.9/+/refs/heads/int/13/fp3/drivers/power/supply/qcom/qpnp-smb5.c#414 Regards Luca > + status = "okay"; > +}; > + > &pon_pwrkey { > status = "okay"; > }; > @@ -607,6 +649,10 @@ &usb { > status = "okay"; > }; > > +&usb_dwc3_hs { > + remote-endpoint = <&pmi632_hs_in>; > +}; > + > &usb_hsphy { > vdd-supply = <&vreg_l4a_0p9>; > vdda-pll-supply = <&vreg_l12a_1p8>; > @@ -622,6 +668,10 @@ &usb_qmpphy { > status = "okay"; > }; > > +&usb_qmpphy_out { > + remote-endpoint = <&pmi632_ss_in>; > +}; > + > &wifi { > vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; > vdd-1.8-xo-supply = <&vreg_l16a_1p3>; > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > index 76c429e8ebab..01dff6641280 100644 > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > @@ -878,8 +878,29 @@ usb_qmpphy: phy@1615000 { > clock-output-names = "usb3_phy_pipe_clk_src"; > > #phy-cells = <0>; > + orientation-switch; > > status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + usb_qmpphy_out: endpoint { > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + usb_qmpphy_usb_ss_in: endpoint { > + remote-endpoint = <&usb_dwc3_ss>; > + }; > + }; > + }; > }; > > system_noc: interconnect@1880000 { > @@ -1614,6 +1635,28 @@ usb_dwc3: usb@4e00000 { > snps,has-lpm-erratum; > snps,hird-threshold = /bits/ 8 <0x10>; > snps,usb3_lpm_capable; > + > + usb-role-switch; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + usb_dwc3_hs: endpoint { > + }; > + }; > + > + port@1 { > + reg = <1>; > + > + usb_dwc3_ss: endpoint { > + remote-endpoint = <&usb_qmpphy_usb_ss_in>; > + }; > + }; > + }; > }; > }; >
On Tue, 23 Jan 2024 at 22:32, Luca Weiss <luca.weiss@fairphone.com> wrote: > > On Sat Jan 13, 2024 at 9:55 PM CET, Dmitry Baryshkov wrote: > > Plug in USB-C related bits and pieces to enable USB role switching and > > USB-C orientation handling for the Qualcomm RB2 board. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 50 ++++++++++++++++++++++++++++++++ > > arch/arm64/boot/dts/qcom/sm6115.dtsi | 43 +++++++++++++++++++++++++++ > > 2 files changed, 93 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > > index 52f31f3166c2..696d6d43c56b 100644 > > --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > > +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts > > @@ -6,8 +6,10 @@ > > /dts-v1/; > > > > #include <dt-bindings/leds/common.h> > > +#include <dt-bindings/usb/pd.h> > > #include "sm4250.dtsi" > > #include "pm6125.dtsi" > > +#include "pmi632.dtsi" > > > > / { > > model = "Qualcomm Technologies, Inc. QRB4210 RB2"; > > @@ -256,6 +258,46 @@ kypd_vol_up_n: kypd-vol-up-n-state { > > }; > > }; > > > > +&pmi632_typec { > > + status = "okay"; > > + > > + connector { > > + compatible = "usb-c-connector"; > > + > > + power-role = "dual"; > > + data-role = "dual"; > > + self-powered; > > + > > + typec-power-opmode = "default"; > > + pd-disable; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + pmi632_hs_in: endpoint { > > + remote-endpoint = <&usb_dwc3_hs>; > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + pmi632_ss_in: endpoint { > > + remote-endpoint = <&usb_qmpphy_out>; > > + }; > > + }; > > + }; > > + }; > > +}; > > + > > +&pmi632_vbus { > > + regulator-min-microamp = <500000>; > > + regulator-max-microamp = <3000000>; > > Hi Dmitry, > > Are you sure vbus can supply 3000mA? > > In Qualcomm's document 80-PF208-77 I see 1000mA is the maximum it can > provide, and I see the same value looking into downstream smb5 driver > in sdm632 sources. Indeed, you are correct here. It seems I confused vbus current with charge current > > https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-4.9/+/refs/heads/int/13/fp3/drivers/power/supply/qcom/qpnp-smb5.c#414 > > Regards > Luca > > > + status = "okay"; > > +}; > > + > > &pon_pwrkey { > > status = "okay"; > > }; > > @@ -607,6 +649,10 @@ &usb { > > status = "okay"; > > }; > > > > +&usb_dwc3_hs { > > + remote-endpoint = <&pmi632_hs_in>; > > +}; > > + > > &usb_hsphy { > > vdd-supply = <&vreg_l4a_0p9>; > > vdda-pll-supply = <&vreg_l12a_1p8>; > > @@ -622,6 +668,10 @@ &usb_qmpphy { > > status = "okay"; > > }; > > > > +&usb_qmpphy_out { > > + remote-endpoint = <&pmi632_ss_in>; > > +}; > > + > > &wifi { > > vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; > > vdd-1.8-xo-supply = <&vreg_l16a_1p3>; > > diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > index 76c429e8ebab..01dff6641280 100644 > > --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi > > @@ -878,8 +878,29 @@ usb_qmpphy: phy@1615000 { > > clock-output-names = "usb3_phy_pipe_clk_src"; > > > > #phy-cells = <0>; > > + orientation-switch; > > > > status = "disabled"; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + usb_qmpphy_out: endpoint { > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + usb_qmpphy_usb_ss_in: endpoint { > > + remote-endpoint = <&usb_dwc3_ss>; > > + }; > > + }; > > + }; > > }; > > > > system_noc: interconnect@1880000 { > > @@ -1614,6 +1635,28 @@ usb_dwc3: usb@4e00000 { > > snps,has-lpm-erratum; > > snps,hird-threshold = /bits/ 8 <0x10>; > > snps,usb3_lpm_capable; > > + > > + usb-role-switch; > > + > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + > > + usb_dwc3_hs: endpoint { > > + }; > > + }; > > + > > + port@1 { > > + reg = <1>; > > + > > + usb_dwc3_ss: endpoint { > > + remote-endpoint = <&usb_qmpphy_usb_ss_in>; > > + }; > > + }; > > + }; > > }; > > }; > > >
diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts index 52f31f3166c2..696d6d43c56b 100644 --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts @@ -6,8 +6,10 @@ /dts-v1/; #include <dt-bindings/leds/common.h> +#include <dt-bindings/usb/pd.h> #include "sm4250.dtsi" #include "pm6125.dtsi" +#include "pmi632.dtsi" / { model = "Qualcomm Technologies, Inc. QRB4210 RB2"; @@ -256,6 +258,46 @@ kypd_vol_up_n: kypd-vol-up-n-state { }; }; +&pmi632_typec { + status = "okay"; + + connector { + compatible = "usb-c-connector"; + + power-role = "dual"; + data-role = "dual"; + self-powered; + + typec-power-opmode = "default"; + pd-disable; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmi632_hs_in: endpoint { + remote-endpoint = <&usb_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + pmi632_ss_in: endpoint { + remote-endpoint = <&usb_qmpphy_out>; + }; + }; + }; + }; +}; + +&pmi632_vbus { + regulator-min-microamp = <500000>; + regulator-max-microamp = <3000000>; + status = "okay"; +}; + &pon_pwrkey { status = "okay"; }; @@ -607,6 +649,10 @@ &usb { status = "okay"; }; +&usb_dwc3_hs { + remote-endpoint = <&pmi632_hs_in>; +}; + &usb_hsphy { vdd-supply = <&vreg_l4a_0p9>; vdda-pll-supply = <&vreg_l12a_1p8>; @@ -622,6 +668,10 @@ &usb_qmpphy { status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pmi632_ss_in>; +}; + &wifi { vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>; vdd-1.8-xo-supply = <&vreg_l16a_1p3>; diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 76c429e8ebab..01dff6641280 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -878,8 +878,29 @@ usb_qmpphy: phy@1615000 { clock-output-names = "usb3_phy_pipe_clk_src"; #phy-cells = <0>; + orientation-switch; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_qmpphy_out: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_qmpphy_usb_ss_in: endpoint { + remote-endpoint = <&usb_dwc3_ss>; + }; + }; + }; }; system_noc: interconnect@1880000 { @@ -1614,6 +1635,28 @@ usb_dwc3: usb@4e00000 { snps,has-lpm-erratum; snps,hird-threshold = /bits/ 8 <0x10>; snps,usb3_lpm_capable; + + usb-role-switch; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_dwc3_ss: endpoint { + remote-endpoint = <&usb_qmpphy_usb_ss_in>; + }; + }; + }; }; };
Plug in USB-C related bits and pieces to enable USB role switching and USB-C orientation handling for the Qualcomm RB2 board. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 50 ++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/sm6115.dtsi | 43 +++++++++++++++++++++++++++ 2 files changed, 93 insertions(+)